Exploiting structural duplication for lifetime reliability enhancement

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2005, Pages 520-531

  Srinivasan, Jayanth ^a   Adve, Sarita V ^a   Bose, Pradip ^b   Rivers, Jude A ^b  

^a University of Illinois at Urbana Champaign   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GRACEFUL PERFORMANCE DEGRADATION (GPD); PROCESSOR RELIABILITY; STRUCTURAL DUPLICATION; STRUCTURAL REDUNDANCY;

COSTS; MULTIPROCESSING SYSTEMS; PROBLEM SOLVING; PROGRAM PROCESSORS; RELIABILITY;

COMPUTER ARCHITECTURE;

EID: 27544457181     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2005.28     Document Type: Conference Paper

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