Board-level fault diagnosis using bayesian inference

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2010, Pages 244-249

  Zhang, Zhaobo ^a   Wang, Zhanglei ^b   Gu, Xinli ^b   Chakrabarty, Krishnendu ^a  

^a DUKE UNIVERSITY   (United States)

^b CISCO SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BAYESIAN INFERENCE; BOARD-LEVEL; CLASSIFICATION ,; COST-EFFICIENT; DECISION MAKING UNDER UNCERTAINTY; FAULT DIAGNOSIS; FAULTY DEVICES; FREE-BOARDS; FUNCTIONAL FAILURE; FUNCTIONAL TEST; HIGH CONFIDENCE; INFERENCE TECHNIQUES; INTEGRATION DENSITY; LOCALIZATION ACCURACY; MANUFACTURING COST; OPEN-SOURCE; OPERATING SPEED; PATTERN ANALYSIS; PROBABILISTIC METHODS; PRODUCT QUALIFICATION; PRODUCT QUALITY; SYSTEM ON CHIPS; TIME-TO-MARKET;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COST REDUCTION; DECISION MAKING; FAILURE ANALYSIS; INFERENCE ENGINES; UNCERTAINTY ANALYSIS;

BAYESIAN NETWORKS;

EID: 77953893973     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2010.5469569     Document Type: Conference Paper

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