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Volumn 3, Issue 3, 2008, Pages 14-24

Energy driven application self-adaptation at run-time

Author keywords

Adaptation; Application; Energy; Estimation; Macro modeling; Power

Indexed keywords

APPLICATIONS; ECONOMIC AND SOCIAL EFFECTS; ENERGY UTILIZATION; ESTIMATION; MACROS; QUALITY OF SERVICE;

EID: 76449108524     PISSN: 1796203X     EISSN: None     Source Type: Journal    
DOI: 10.4304/jcp.3.3.14-24     Document Type: Article
Times cited : (2)

References (23)
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  • 2
    • 46649088350 scopus 로고    scopus 로고
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    • J. Peddersen and S. Parameswaran, "CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time," in Proceedings of the ASP-DAC, 2007.
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    • Peddersen, J.1    Parameswaran, S.2
  • 4
    • 0004173639 scopus 로고    scopus 로고
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    • (1996) Low Power Design Methodologies
  • 6
    • 0346148512 scopus 로고    scopus 로고
    • Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-Time Embedded Systems
    • Y. Le, J. Luo, and N. Jha, "Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-Time Embedded Systems," in Proceedings of the International Conference on Computer-Aided Design, 2003.
    • (2003) Proceedings of the International Conference on Computer-Aided Design
    • Le, Y.1    Luo, J.2    Jha, N.3
  • 8
    • 0038528639 scopus 로고    scopus 로고
    • Effectiveness of Adaptive Supply Voltage and Body Bias for Reducing Impact of Parameter Variations in Low Power and High Performance Microprocessors
    • May
    • J. Tschanz, S. Narendra, R. Nair, and V. De, "Effectiveness of Adaptive Supply Voltage and Body Bias for Reducing Impact of Parameter Variations in Low Power and High Performance Microprocessors," in IEEE Journal of Solid-State Circuits, May 2003, vol. 38, no. 5, pp. 826-829.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , Issue.5 , pp. 826-829
    • Tschanz, J.1    Narendra, S.2    Nair, R.3    De, V.4
  • 11
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    • High-Level Macro-Modeling and Estimation Techniques for Switching Activity and Power Consumption
    • Aug
    • A. Raghunathan, S. Dey, and Jha, "High-Level Macro-Modeling and Estimation Techniques for Switching Activity and Power Consumption," in IEEE Transactions on Very Large Scale Integration Systems, Aug 2003, vol. 11, no. 4.
    • (2003) IEEE Transactions on Very Large Scale Integration Systems , vol.11 , Issue.4
    • Raghunathan, A.1    Dey, S.2    Jha3
  • 13
    • 0032650587 scopus 로고    scopus 로고
    • A Low Power Hardware/software Partitioning Approach for Core-Based Embedded Systems
    • J. Henkel, "A Low Power Hardware/software Partitioning Approach for Core-Based Embedded Systems," in Proceedings of DAC, 1999.
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    • Henkel, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.