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Volumn , Issue , 2003, Pages 21-28

A power-aware, best-effort real-time task scheduling algorithm

Author keywords

Automatic control; Availability; Energy consumption; Optimal control; Power system modeling; Power system reliability; Processor scheduling; Real time systems; Scheduling algorithm; Timing

Indexed keywords

ALGORITHMS; AUTOMATION; AVAILABILITY; CONTROL; ELECTRIC POWER UTILIZATION; EMBEDDED SYSTEMS; ENERGY UTILIZATION; INTERACTIVE COMPUTER SYSTEMS; MULTITASKING; OPTIMIZATION; POWER MANAGEMENT; REAL TIME SYSTEMS; SCHEDULING;

EID: 84942099878     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/WSTFES.2003.1201354     Document Type: Conference Paper
Times cited : (20)

References (15)
  • 1
    • 0030151031 scopus 로고    scopus 로고
    • A scheduling algorithm for tasks described by time value function
    • May
    • K. Chen and P. Muhlethaler. A scheduling algorithm for tasks described by time value function. Journal of Real-Time Systems, 10(3):293-312, May 1996.
    • (1996) Journal of Real-Time Systems , vol.10 , Issue.3 , pp. 293-312
    • Chen, K.1    Muhlethaler, P.2
  • 7
    • 0036685093 scopus 로고    scopus 로고
    • Guest editor's introduction to special section on asynchronous real-time distributed systems
    • August
    • E. D. Jensen and B. Ravindran. Guest editor's introduction to special section on asynchronous real-time distributed systems. IEEE Trans. on Computers, 51(8):881-882, August 2002.
    • (2002) IEEE Trans. on Computers , vol.51 , Issue.8 , pp. 881-882
    • Jensen, E.D.1    Ravindran, B.2
  • 9
    • 84974687699 scopus 로고
    • Scheduling algorithms for multiprogramming in a hard real-time environment
    • C. L. Liu and J. W. Layland. Scheduling algorithms for multiprogramming in a hard real-time environment. JACM, 20(1):46-61, 1973.
    • (1973) JACM , vol.20 , Issue.1 , pp. 46-61
    • Liu, C.L.1    Layland, J.W.2
  • 13
    • 0035242910 scopus 로고    scopus 로고
    • Non-ideal battery and main memory effects on cpu speed-setting for low power
    • February
    • T. Martin and D. Siewiorek. Non-ideal battery and main memory effects on cpu speed-setting for low power. IEEE Transactions on VLSI Systems, 9(1):29-34, February 2001.
    • (2001) IEEE Transactions on VLSI Systems , vol.9 , Issue.1 , pp. 29-34
    • Martin, T.1    Siewiorek, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.