Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 721-725

  Martin, Steven M ^a   Flautner, Krisztian ^b   Mudge, Trevor ^a   Blaauw, David ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b ARM LTD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE BODY BIASING; DYNAMIC VOLTAGE SCALING; DYNAMIC WORKLOAD; SOFTWARE PACKAGE SPICE;

COMPUTER SIMULATION; ELECTRIC LOSSES; ELECTRIC POWER SUPPLIES TO APPARATUS; LEAKAGE CURRENTS; LEAST SQUARES APPROXIMATIONS; MATHEMATICAL MODELS; MOSFET DEVICES; OPTIMIZATION; REGRESSION ANALYSIS; SHORT CIRCUIT CURRENTS; THRESHOLD VOLTAGE;

MICROPROCESSOR CHIPS;

EID: 0036917242     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/774572.774678     Document Type: Conference Paper

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