A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS pipeline ADC

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 12, 2009, Pages 3305-3313

  Devarajan, Siddharth ^a   Singer, Larry ^a   Kelly, Dan ^a   Decker, Steven ^a   Kamath, Abhishek ^a   Wilkins, Paul ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

ADC; Amplifier; Calibration; CMOS; Comparator; Dither; Pipeline; SHA less; Switched capacitor circuits

Indexed keywords

AMPLIFIER; ANALOG TO DIGITAL CONVERTERS; CAPACITOR MISMATCH; CMOS; CMOS COMPARATORS; CMOS PROCESSS; DIGITAL CALIBRATIONS; INPUT SIGNAL; LOW POWER; PIPELINE ADCS; SMALL SIGNAL; SWITCHED CAPACITOR CIRCUITS;

CALIBRATION; CAPACITANCE; CAPACITORS; COMPARATORS (OPTICAL); PIPELINES; SIGNAL TO NOISE RATIO;

MULTICARRIER MODULATION;

EID: 72949124020     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2032636     Document Type: Conference Paper

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