A 12b 65MSample/s CMOS ADC with 82dB SFDR at 120MHz

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 38-39

  Singer, L ^a   Ho, S ^a   Timko, M ^a   Kelly, D ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BANDWIDTH; CAPACITORS; CELLULAR TELEPHONE SYSTEMS; CMOS INTEGRATED CIRCUITS; ERROR ANALYSIS; LOGIC DESIGN; SIGNAL TO NOISE RATIO; TIMING JITTER;

CELLULAR BASESTATION DESIGN;

ANALOG TO DIGITAL CONVERSION;

EID: 0034428237     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. A 10b 20MSample/s 35mW pipeline A/D converter
2. A 14b 10MHz calibration-free CMOS pipelined A/D converter
3. Digital-domain calibration of multistep analog-to-digital converters
4. A 1.5V 10b 14.3MSample/s CMOS pipeline analog-to-digital converter
5. A cascaded sigma-delta pipeline A/D converter with 1.25MHz signal bandwidth and 89dB SNR