-
1
-
-
0029269932
-
A 10 b, 20 MSample/s, 35 mW pipeline A/D converter
-
Mar
-
T. Cho and P. R. Gray, "A 10 b, 20 MSample/s, 35 mW pipeline A/D converter," IEEE J. Solid-State Circuits, vol. 30, no. 3, pp. 166-172, Mar. 1995.
-
(1995)
IEEE J. Solid-State Circuits
, vol.30
, Issue.3
, pp. 166-172
-
-
Cho, T.1
Gray, P.R.2
-
2
-
-
0026901915
-
Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications
-
Aug
-
S. H. Lewis, "Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 39, no. 8, pp. 516-523, Aug. 1992.
-
(1992)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.39
, Issue.8
, pp. 516-523
-
-
Lewis, S.H.1
-
3
-
-
0346972345
-
A 69-m.W 10-bit 80-MSample/s pipelined CMOS ADC
-
Dec
-
B.-M. Min, P. Kim, F. W. Bowman, D. Boisvert, and A. J. Aude, "A 69-m.W 10-bit 80-MSample/s pipelined CMOS ADC," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2031-2039, Dec. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.12
, pp. 2031-2039
-
-
Min, B.-M.1
Kim, P.2
Bowman, F.W.3
Boisvert, D.4
Aude, A.J.5
-
4
-
-
84881169603
-
Limits on ADC power dissipation
-
M. Steyaert, A. H. M. Roermund, and J. H. van Huijsing, Eds. New York: Springer
-
B. Murmann, "Limits on ADC power dissipation," in Analog Circuit Design, M. Steyaert, A. H. M. Roermund, and J. H. van Huijsing, Eds. New York: Springer, 2006.
-
(2006)
Analog Circuit Design
-
-
Murmann, B.1
-
5
-
-
0348233280
-
A 12-b 75-MS/s pipelined ADC using open-loop residue amplification
-
Dec
-
B. Murmann and B. E. Boser, "A 12-b 75-MS/s pipelined ADC using open-loop residue amplification," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2040-2050, Dec. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.12
, pp. 2040-2050
-
-
Murmann, B.1
Boser, B.E.2
-
6
-
-
33947637230
-
A 12-bit 75-MS/s pipelined ADC using incomplete settling
-
Apr
-
E. Iroaga and B. Murmann, "A 12-bit 75-MS/s pipelined ADC using incomplete settling," IEEE J. Solid-State Circuits, vol. 42, no. 4, pp. 748-756, Apr. 2007.
-
(2007)
IEEE J. Solid-State Circuits
, vol.42
, Issue.4
, pp. 748-756
-
-
Iroaga, E.1
Murmann, B.2
-
7
-
-
57849161405
-
A zero-crossing-based 9-bit 200 MS/s pipelined ADC
-
Dec
-
L. Brooks and H.-S. Lee, "A zero-crossing-based 9-bit 200 MS/s pipelined ADC," IEEE J. Solid-State Cirvuits, vol. 42, no. 12, pp. 2677-2687, Dec. 2007.
-
(2007)
IEEE J. Solid-State Cirvuits
, vol.42
, Issue.12
, pp. 2677-2687
-
-
Brooks, L.1
Lee, H.-S.2
-
8
-
-
51949092811
-
A process-scalable low-power charge-domain 13-bit pipeline ADC
-
Jun
-
M. Anthony, E. Kohler, J. Kurtze, L. Kushner, and G. Sollner, "A process-scalable low-power charge-domain 13-bit pipeline ADC," in VLSI Circuits Symp. Dig. Tech. Papers, Jun. 2008, pp. 222-223.
-
(2008)
VLSI Circuits Symp. Dig. Tech. Papers
, pp. 222-223
-
-
Anthony, M.1
Kohler, E.2
Kurtze, J.3
Kushner, L.4
Sollner, G.5
-
9
-
-
51949099980
-
A 9.4-bit, 50-MS/s, 1.44-mW pipelined ADC using dynamic residue amplification
-
Jun
-
J. Hu, N. Dolev, and B. Murmann, "A 9.4-bit, 50-MS/s, 1.44-mW pipelined ADC using dynamic residue amplification," in VLSI Circuits Symp. Dig. Tech. Papers, Jun. 2008, pp. 216-217.
-
(2008)
VLSI Circuits Symp. Dig. Tech. Papers
, pp. 216-217
-
-
Hu, J.1
Dolev, N.2
Murmann, B.3
-
10
-
-
0032632072
-
Analog-to-digital converter survey and analysis
-
Apr
-
R. H. Walden, "Analog-to-digital converter survey and analysis," IEEE J. Select. Areas Commun., vol. 17, no. 4, pp. 539-550, Apr. 1999.
-
(1999)
IEEE J. Select. Areas Commun
, vol.17
, Issue.4
, pp. 539-550
-
-
Walden, R.H.1
-
11
-
-
0018470554
-
Dynamic amplifier for m.o.s. technology
-
May
-
M. A. Copeland and J. M. Rabaey, "Dynamic amplifier for m.o.s. technology," Electmn. Lett., vol. 15, pp. 301-302, May 1979.
-
(1979)
Electmn. Lett
, vol.15
, pp. 301-302
-
-
Copeland, M.A.1
Rabaey, J.M.2
-
12
-
-
0348233247
-
Discrete-time parametric amplification based on a three-terminal MOS varactor: Analysis and experimental results
-
Dec
-
S. Ranganathan and Y. Tsividis, "Discrete-time parametric amplification based on a three-terminal MOS varactor: Analysis and experimental results," IEEE J. Solid-State Circuits, vol. 38, pp. 2087-2093, Dec. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, pp. 2087-2093
-
-
Ranganathan, S.1
Tsividis, Y.2
-
13
-
-
11944274556
-
Analog circuits in ultra-deep-submicron CMOS
-
Jan
-
A.-J. Annema, B. Nauta, R. van Langevelde, and H. Tuinhout, "Analog circuits in ultra-deep-submicron CMOS," IEEE J. Solid-State Circuits, vol. 40, no. 1, pp. 132-143, Jan. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.1
, pp. 132-143
-
-
Annema, A.-J.1
Nauta, B.2
van Langevelde, R.3
Tuinhout, H.4
-
14
-
-
0022305546
-
Low-distortion switched-capacitor filter design techniques
-
Dec
-
K.-L. Lee and R. G. Meyer, "Low-distortion switched-capacitor filter design techniques," IEEE J. Solid-State Circuits, vol. 20, no. 6, pp. 1103-1113, Dec. 1985.
-
(1985)
IEEE J. Solid-State Circuits
, vol.20
, Issue.6
, pp. 1103-1113
-
-
Lee, K.-L.1
Meyer, R.G.2
-
15
-
-
0032664038
-
A1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter
-
May
-
A.M. Abo and P. R. Gray, "A1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter," IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 599-606, May 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, Issue.5
, pp. 599-606
-
-
Abo, A.M.1
Gray, P.R.2
-
16
-
-
0031379139
-
Circuits and technology for digital's StrongARM and ALPHA microprocessors [CMOS technology]
-
D. W. Dobberpuhl, "Circuits and technology for digital's StrongARM and ALPHA microprocessors [CMOS technology]," in Proc. 17th IEEE Conf. Advanced Research in VLSI, 1997, pp. 2-11.
-
(1997)
Proc. 17th IEEE Conf. Advanced Research in VLSI
, pp. 2-11
-
-
Dobberpuhl, D.W.1
-
17
-
-
2442431817
-
Offset compensation in comparators with minimum input-referred supply noise
-
May
-
K.-L. Wong and C.-K. Yang, "Offset compensation in comparators with minimum input-referred supply noise," IEEE J. Solid-State Circuits, vol. 39, no. 5, pp. 837-839, May 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.5
, pp. 837-839
-
-
Wong, K.-L.1
Yang, C.-K.2
-
18
-
-
0027853599
-
A 15-b 1-Msample/s digitally self-calibrated pipeline ADC
-
Dec
-
A. N. Karanicolas, H.-S. Lee, and K. L. Barcrania, "A 15-b 1-Msample/s digitally self-calibrated pipeline ADC," IEEE J. Solid-State Circuits, vol. 28, no. 12, pp. 1207-1215, Dec. 1993.
-
(1993)
IEEE J. Solid-State Circuits
, vol.28
, Issue.12
, pp. 1207-1215
-
-
Karanicolas, A.N.1
Lee, H.-S.2
Barcrania, K.L.3
-
19
-
-
33746874490
-
A 14-bit 125 MS/s IF/RF sampling pipelined ADC with 100 dB SFDR and 50 fs jitter
-
Aug
-
A. M. A. Ali et al., "A 14-bit 125 MS/s IF/RF sampling pipelined ADC with 100 dB SFDR and 50 fs jitter," IEEE J. Solid-State Circuits, vol. 41, no. 8, pp. 1846-1855, Aug. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.8
, pp. 1846-1855
-
-
Ali, A.M.A.1
-
20
-
-
0035473398
-
An 8-bit 80-MSample/s pipelined ADC with background calibration
-
Oct
-
J. Ming and S. H. Lewis, "An 8-bit 80-MSample/s pipelined ADC with background calibration," IEEE J. Solid-State Circuits, vol. 36, no. 10, pp. 1489-1497, Oct. 2001.
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, Issue.10
, pp. 1489-1497
-
-
Ming, J.1
Lewis, S.H.2
-
21
-
-
84857357345
-
White noise in MOS transistors and resistors
-
Nov
-
R. Sarpeshkar, T. Delbruck, and C. A. Mead, "White noise in MOS transistors and resistors," IEEE Circuits and Devices Mag., vol. 9, no. 6, pp. 23-29, Nov. 1993.
-
(1993)
IEEE Circuits and Devices Mag
, vol.9
, Issue.6
, pp. 23-29
-
-
Sarpeshkar, R.1
Delbruck, T.2
Mead, C.A.3
-
22
-
-
0035111662
-
Analysis of temporal noise in CMOS photodiode active pixel sensor
-
Jan
-
H. Tian, B. Fowler, and A. E. Gamal, "Analysis of temporal noise in CMOS photodiode active pixel sensor," IEEE J. Solid-State Circuits, vol. 36, no. 1, pp. 92-101, Jan. 2001.
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, Issue.1
, pp. 92-101
-
-
Tian, H.1
Fowler, B.2
Gamal, A.E.3
-
23
-
-
4444226652
-
Using histogram techniques to measure A/D converter noise
-
S. Ruscak and L. Singer, "Using histogram techniques to measure A/D converter noise," Analog Dialogue, vol. 29-2, 1995.
-
(1995)
Analog Dialogue
, vol.29 -2
-
-
Ruscak, S.1
Singer, L.2
|