-
1
-
-
72849110453
-
-
ITRS International Technology Roadmap for Semiconductors
-
ITRS International Technology Roadmap for Semiconductors, http://public.itrs.net/.
-
-
-
-
2
-
-
33646271349
-
High-Performance Fully Depleted Silicon Nanowire (Diameter ≤ 5) Gate-All-Around CMOS Devices
-
N. Singh, A. Agarwal, L.K. Bera, T.Y. Liow, R. Yang, S.C. Rustagi, C.H. Tung, R. Kumar, G.Q. Lo, N. Balasubramanian, and D.-L. Kwong, "High-Performance Fully Depleted Silicon Nanowire (Diameter ≤ 5) Gate-All-Around CMOS Devices", IEEE Electron Dev. Lett., 27, no.5, pp.383, (2006).
-
(2006)
IEEE Electron Dev. Lett
, vol.27
, Issue.5
, pp. 383
-
-
Singh, N.1
Agarwal, A.2
Bera, L.K.3
Liow, T.Y.4
Yang, R.5
Rustagi, S.C.6
Tung, C.H.7
Kumar, R.8
Lo, G.Q.9
Balasubramanian, N.10
Kwong, D.-L.11
-
3
-
-
35649025330
-
Hole mobility in silicon inversion layers: Stress and surface orientation,
-
S.E. Thompson, G. Sun, K. Wu, J. Lim, and T. Nishi, "Hole mobility in silicon inversion layers: Stress and surface orientation,", J. Appl. Phys., 102, pp.84501-7, 2007
-
(2007)
J. Appl. Phys
, vol.102
, pp. 84501-84507
-
-
Thompson, S.E.1
Sun, G.2
Wu, K.3
Lim, J.4
Nishi, T.5
-
4
-
-
39549093534
-
Fabrication, Characterization and Modeling of Strained SOI MOSFETs with Very Large Effective Mobility
-
Munich Germany
-
F. Driussi, et al, "Fabrication, Characterization and Modeling of Strained SOI MOSFETs with Very Large Effective Mobility", The 37th European Solid-State Device Research Conference (ESSDERC), Munich Germany, (2007).
-
(2007)
The 37th European Solid-State Device Research Conference (ESSDERC)
-
-
Driussi, F.1
-
5
-
-
33646043420
-
Uniaxial-Process- Induced Strained-Si: Extending the CMOS Roadmap
-
S.E. Thompson, G. Sun, Y.S. Choi, and T. Nishi, "Uniaxial-Process- Induced Strained-Si: Extending the CMOS Roadmap "IEEE Trans. Electron Dev., 53, no.5, pp.1010 (2006).
-
(2006)
IEEE Trans. Electron Dev
, vol.53
, Issue.5
, pp. 1010
-
-
Thompson, S.E.1
Sun, G.2
Choi, Y.S.3
Nishi, T.4
-
6
-
-
33847754669
-
Uniaxial-Biaxial Stress Hybridization For Super-Critical Strained-Si Directly On Insulator (SC-SSOI) PMOS With Different Channel Orientations
-
A.V-Y. Thean et al., "Uniaxial-Biaxial Stress Hybridization For Super-Critical Strained-Si Directly On Insulator (SC-SSOI) PMOS With Different Channel Orientations", IEDM Tech. Digest., pp.509, (2005).
-
(2005)
IEDM Tech. Digest
, pp. 509
-
-
Thean, A.V.-Y.1
-
7
-
-
54849438294
-
Fabrication of uniaxially strained silicon nanowires
-
S.F. Feste, J. Knoch, D. Buca, and S. Mantl, "Fabrication of uniaxially strained silicon nanowires", Thin Solid Films, 517, pp.320, (2008).
-
(2008)
Thin Solid Films
, vol.517
, pp. 320
-
-
Feste, S.F.1
Knoch, J.2
Buca, D.3
Mantl, S.4
-
8
-
-
30344467214
-
Growth of strained Si on He ion implanted Si/SiGe heterostructures
-
D. Buca, S.F. Feste, B. Holländer, S. Mantl, R. Loo, M. Caymax, R. Carius, H. Schaefer, "Growth of strained Si on He ion implanted Si/SiGe heterostructures", Solid-State Electron., 50, pp.32, (2006).
-
(2006)
Solid-State Electron
, vol.50
, pp. 32
-
-
Buca, D.1
Feste, S.F.2
Holländer, B.3
Mantl, S.4
Loo, R.5
Caymax, M.6
Carius, R.7
Schaefer, H.8
-
9
-
-
33846443951
-
Asymmetric strain relaxation in patterned SiGe layers: A means to enhance carrier mobilities in Si cap layers
-
D. Buca, B. Holländer, S. Feste, St. Lenk, H. Trinkaus, and S. Mantl, "Asymmetric strain relaxation in patterned SiGe layers: A means to enhance carrier mobilities in Si cap layers" Appl. Phys. Lett., 90, pp.32108, (2007).
-
(2007)
Appl. Phys. Lett
, vol.90
, pp. 32108
-
-
Buca, D.1
Holländer, B.2
Feste, S.3
Lenk, S.4
Trinkaus, H.5
Mantl, S.6
-
10
-
-
64549133311
-
Electron Mobility in Multiple Silicon Nanowires GGA nMOSFETs on (110) and (100) SOI at Room and Low Temperature
-
J. Chen, T. Saraya, and T. Hiramoto, "Electron Mobility in Multiple Silicon Nanowires GGA nMOSFETs on (110) and (100) SOI at Room and Low Temperature "IEDM Tech. Digest, 90, pp.757, (2008).
-
(2008)
IEDM Tech. Digest
, vol.90
, pp. 757
-
-
Chen, J.1
Saraya, T.2
Hiramoto, T.3
-
11
-
-
21644454069
-
In-Plane Mobility Anisotropy and Universality Under Uni-axial Strains in n-and p-MOS Inversion Layers on (100), (110), and (111) Si
-
H. Irie, K. Kita, K. Kyuno, and A. Toriumi, "In-Plane Mobility Anisotropy and Universality Under Uni-axial Strains in n-and p-MOS Inversion Layers on (100), (110), and (111) Si", IEDM Tech. Digest., pp.225, (2004).
-
(2004)
IEDM Tech. Digest
, pp. 225
-
-
Irie, H.1
Kita, K.2
Kyuno, K.3
Toriumi, A.4
-
12
-
-
46049115710
-
Electron Transport Properties of Ultrathin-body and Tri-gate SOI nMOSFETs with Biaxial and Uniaxial Strain
-
T. Irisawa, T. Numata, T. Tezuka, N. Sugiyama, and S-I. Takagi, "Electron Transport Properties of Ultrathin-body and Tri-gate SOI nMOSFETs with Biaxial and Uniaxial Strain", IEDM Tech. Digest, pp.1, (2006).
-
(2006)
IEDM Tech. Digest
, pp. 1
-
-
Irisawa, T.1
Numata, T.2
Tezuka, T.3
Sugiyama, N.4
Takagi, S.-I.5
-
13
-
-
33847697736
-
Physical Mechanism of Electron Mobility Enhancement in Uniaxial Stressed MOSFETs and Impact of Uniaxial Stress Engineering in Ballistic Regime
-
K. Uchida, T. Krishnamohan, K.C. Saraswat, and Y. Nishi, "Physical Mechanism of Electron Mobility Enhancement in Uniaxial Stressed MOSFETs and Impact of Uniaxial Stress Engineering in Ballistic Regime", IEDM Tech. Digest, pp.129, (2005).
-
(2005)
IEDM Tech. Digest
, pp. 129
-
-
Uchida, K.1
Krishnamohan, T.2
Saraswat, K.C.3
Nishi, Y.4
-
14
-
-
45849086584
-
Integration challanges for advanced process-strained CMOS on biaxially -strained SOI (SSOI) substrates
-
A. Wai et al., "Integration challanges for advanced process-strained CMOS on biaxially -strained SOI (SSOI) substrates", ECS transactions, 6, no. 1, (2007).
-
(2007)
ECS transactions
, vol.6
, Issue.1
-
-
Wai, A.1
-
15
-
-
33745141899
-
High Current Drive Uniaxially-Strained SGOI pMOSFETs Fabricated by Lateral Strain Relaxation Technique
-
T. Irisawa, T. Numata, T. Tezuka, K. Usuda, N. Hirashita, N. Sugiyama, E. Toyoda, and S. Takagi, "High Current Drive Uniaxially-Strained SGOI pMOSFETs Fabricated by Lateral Strain Relaxation Technique", Symp. on VLSI Techn. Digest, pp.178 (2005).
-
(2005)
Symp. on VLSI Techn. Digest
, pp. 178
-
-
Irisawa, T.1
Numata, T.2
Tezuka, T.3
Usuda, K.4
Hirashita, N.5
Sugiyama, N.6
Toyoda, E.7
Takagi, S.8
-
16
-
-
20544447617
-
Key Differences For Process-induced Uniaxial vs. Substrate-induced Biaxial Stressed Si and Ge Channel MOSFETs,
-
S.E. Thompson, G. Sun, K. Wu, J. Lim, and T. Nishi, "Key Differences For Process-induced Uniaxial vs. Substrate-induced Biaxial Stressed Si and Ge Channel MOSFETs,", IEDM Tech. Digest., pp.221, 2004
-
(2004)
IEDM Tech. Digest
, pp. 221
-
-
Thompson, S.E.1
Sun, G.2
Wu, K.3
Lim, J.4
Nishi, T.5
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