FastYield: Variation-aware, layout-driven simultaneous binding and module selection for performance yield optimization

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2009, Pages 61-66

  Lucas, Gregory ^a   Cromar, Scott ^a   Chen, Deming ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACCURATE TIMINGS; CLOCK PERIODS; DESIGN HIERARCHIES; FUNCTIONAL UNITS; HIGH-LEVEL SYNTHESIS; LEVEL OF ABSTRACTIONS; MAN HOURS; MODULE SELECTIONS; NEW DESIGNS; POWER VARIATIONS; PROCESS VARIATIONS; SELECTION ALGORITHMS; SPATIAL CORRELATIONS; STATIC TIMING ANALYSIS; SYNTHESIS SOLUTIONS; TECHNOLOGY SCALING; TIMING-DRIVEN; YIELD GAINS; YIELD OPTIMIZATIONS;

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; TIMING DEVICES;

TIME MEASUREMENT;

EID: 64549112149     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2009.4796442     Document Type: Conference Paper

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