A variation aware high level synthesis framework

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2008, Pages 1063-1068

  Wang, Feng ^a   Sun, Guangyu ^a   Xie, Yuan ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA FLOW ANALYSIS; INDUSTRIAL ENGINEERING; RISK ASSESSMENT; SPACE RESEARCH; TECHNOLOGY; TESTING;

COMPUTATION METHODS; DATA FLOW GRAPH; DESIGN CONSTRAINTS; DESIGN SPACE EXPLORATION; FUNCTION UNITS; HIGH-LEVEL SYNTHESIS; MODULE SELECTION; NANO-METER REGIMES; NEW PROCESSES; PARAMETRIC YIELD; POWER CONSTRAINTS; PROCESS VARIATIONS; RESOURCE SHARING; RUN-TIME; WORST-CASE ANALYSIS; YIELD IMPROVEMENTS;

PROCESS ENGINEERING;

EID: 49749115705     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484822     Document Type: Conference Paper

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