Scalable FPGA-array for high-performance and power-efficient computation based on difference schemes

Proceedings - 2nd International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRCTA 2008 - Held in Conjunction with SC08

Volumn , Issue , 2008, Pages

  Sano, Kentaro ^a   Luzhou, Wang ^a   Hatsuda, Yoshiaki ^a   Yamamoto, Satoru ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BENCHMARKING; DATA STORAGE EQUIPMENT; TELECOMMUNICATION SYSTEMS;

ARRAY SIZES; CUSTOM COMPUTING MACHINES; DATA ACCESS; DIFFERENCE SCHEMES; ENERGY CONSUMPTION; MEMORY ARRAYS; MEMORY BANDWIDTHS; NUMERICAL COMPUTATIONS; PEAK PERFORMANCE; PERFORMANCE IMPROVEMENTS; POWER-EFFICIENT; PROCESSING ELEMENTS; QUANTITATIVE EVALUATIONS; SCALABLE MEMORIES; SCIENTIFIC SIMULATIONS; SINGLE PRECISION; SUSTAINED PERFORMANCE; TIGHTLY-COUPLED;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 62949112216     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPRCTA.2008.4745679     Document Type: Conference Paper

References (38)

1. Keith D. Underwood and K. Scott Hemmert, "Closing the gap: Cpu and fpga trends in sustainable floating-point blas performance," Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 219 - 228, 2004.
2. K. Underwood, "Fpga vs. cpus: Trends in peak floating-point performance," Proceedings of the International Symposium on Field- Programmable Gate Arrays, pp. 171 - 180, February 2004.
3. Nabeel Shirazi, Al Walters, and Peter Athanas, "Quantitative analysis of floating point arithmetic on fpga based custom computing machines," Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines, pp. 155 - 162, 1995.
4. Michael deLorimier and André DeHon, "Floating-point sparse matrixvector multiply for fpgas," Proceedings of the International Symposium on Field-Programmable Gate Arrays, pp. 75 - 85, February 2005.
5. Ling Zhuo and Viktor K. Prasanna, "Sparse matrix-vector multiplication on fpgas," Proceedings of the International Symposium on Field- Programmable Gate Arrays, pp. 63 - 74, February 2005.
6. Yong Dou, S. Vassiliadis, G. K. Kuzmanov, and G. N. Gaydadjiev, "64- bit floating-point fpga matrix multiplication," Proceedings of the International Symposium on Field-Programmable Gate Arrays, pp. 86 - 95, February 2005.
7. James P. Durbano, Fernando E. Ortiz, John R. Humphrey, Petersen F. Curt, and Dennis W. Prather, "Fpga-based acceleration of the 3d finitedifference time-domain method," Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 156 - 163, April 2004.
8. Chuan He, Mi Lu, and Chuanwen Sun, "Accelerating seismic migration using fpga-based coprocessor platform," Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 207 - 216, April 2004.
9. Chuan He, Wei Zhao, and Mi Lu, "Time domain numerical simulation for transient waves on reconfigurable coprocessor platform," Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 127 - 136, April 2005.
10. Ronald Scrofano, Maya B. Gokhale, Frans Trouw, and Viktor K. Prasanna, "A hardware/software approach to molecular dynamics on reconfigurable computers," Proceedings of the 14th Annual IEEE Symposium on Field- Programmable Custom Computing Machines, pp. 23 - 34, April 2006.
11. Kentaro Sano, Takanori Iizuka, and Satoru Yamamoto, "Systolic architecture for computational fluid dynamics on fpgas," Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM2007), pp. 107 - 116, April 2007.
12. Ling Zhuo and Viktor K. Prasanna, "Scalable and modular algorithms for floating-point matrix multiplication on reconfigurable computing systems," IEEE Transactions on Parallel and Distributed Systems, vol. 18, no. 4, pp. 433 - 448, April 2007.
13. Ling Zhuo, Gerald R. Morris, and Viktor K. Prasanna, "High- performance reduction circuits using deeply pipelined operators on FPGAs," IEEE Transactions on Parallel and Distributed Systems, vol. 18, no. 10, pp. 1377 - 1392, October 2007.
14. K. Scott Hemmert and Keith D. Underwood, "An analysis of the doubleprecision floating-point fft on fpgas," Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 171 - 180, April 2005.
15. Gerald R. Morris, Viktor K. Prasanna, and Richard D. Anderson, "A hybrid approach for mapping conjugate gradient onto an FPGA-augmented reconfigurable supercomputer," Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 30 - 12, April 2006.
16. Richard L. Walke, Robert W. M. Smith, and Gaye Lightbody, "20- GFLOPS QR processor on a xilinx virtex-e FPGA," Proceedings of SPIE: Advanced Signal Processing Algorithms, Architectures and Implementations X, vol. 4116, pp. 300 - 310, June 2000.
17. Arun Patel, Christopher A. Madill, Manuel Saldana, Christopher Comis, Regis Pomes, and Paul Chow, "A scalable FPGA-based multiprocessor," Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 111 - 120, April 2006.
18. Ronald Scrofano,Maya B. Gokhale, Frans Trouw, and Viktor K. Prasanna, "Accelerating molecular dynamics simulations with reconfigurable computers," IEEE Transactions on Parallel and Distributed Systems, vol. 19, no. 6, pp. 764 - 778, June 2008.
19. Alexander Kaganov, Paul Chow, and Asif Lakhany, "FPGA acceleration of monte-carlo based credit derivative pricing," Proceedings of the International Conference on Field Programmable Logic and Applications, pp. 329 - 334, September 2008.
20. Nathan A.Woods and Tom VanCourt, "FPGA acceleration of quasi-monte carlo in finance," Proceedings of the International Conference on Field Programmable Logic and Applications, pp. 335 - 340, September 2008.
21. T. Hauser, "A flow solver for a reconfigurable fpga-based hypercomputer," AIAA Aerospace Sciences Meeting and Exhibit, 2005.
22. William D. Smith and Austars R. Schnore, "Towards an rcc-based accelerator for computational fluid dynamics applications," The Journal of Supercomputing, vol. 30, no. 3, pp. 239 - 261, December 2003.
23. Ryan N. Schneider, Laurence E. Turner, and Michal M. Okoniewski, "Application of fpga technology to accelerate the finite-difference timedomain (FDTD) method," Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays (FPGA2002), pp. 97 - 105, Febuary 2002.
24. Wang Chen, Panos Kosmas, Miriam Leeser, and Carey Rappaport, "An fpga implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm," Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays (FPGA2004), pp. 213 - 222, Febuary 2004.
25. Tsutomu Hoshino, Toshio Kawai, Tomonori Shirakawa, Junichi Higashino, Akira Yamaoka, Hachidai Ito, Takashi Sato, and Kazuo Sawada, "Pacs: A parallel microprocessor array for scientific calculations," ACM Transactions on Computer Systems, vol. 1, no. 3, pp. 195 - 221, 1983.
26. H. T. Kung, "Why systolic architecture?," Computer, vol. 15, no. 1, pp. 37 - 46, 1982.
27. Kurtis T. Johnson, A.R. Hurson, and Behrooz Shirazi, "General- purpose systolic arrays," Computer, vol. 26, no. 11, pp. 20 - 31, 1993.
28. J. E. Vuillemin, P. Bertin, D. Roncin, M. Shand, H. H. Touati, and P. Boucard, "Programmable active memories: reconfigurable systems come of age," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 4, no. 1, pp. 56 - 69, Mar 1996.
29. David Patterson, Krste Asanovic, Aaron Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos Kozyrakis, David Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, and Katherine Yelick, "Intelligent ram(iram): the industrial setting, applications, and architectures," Proceedings of the International Conference on Computer Design, pp. 2 - 9, October 1997.
30. David Patterson, Thomas Anderson, Neal Cardwell, Richard Fromm, Kimberly Keeton, Christoforos Kozyrakis, Randi Thomas, and Katherine Yelick, "A case for intelligent ram: Iram," IEEE Micro, vol. 17, no. 2, pp. 34 - 44, March/April 1997.
31. Duncan G. Elliott, Michael Stumm, W.Martin Snelgrove, Christian Cojocaru, and Robert Mckenzie, "Computational ram: Implementing processors in memory," Design&Test of Computers, vol. 16, no. 1, pp. 32 - 41, January-March 1999.
32. The Dini Group, "http://www.dinigroup.com/," 2008.
33. Louis A. Hageman and David M. Young, Applied Iterative Methods, Academic Press, 1981.
34. J. Kim and P. Moin, "Application of a fractional-step method to incompressible navier-stokes," Journal of Computational Physics, vol. 59, pp. 308 - 323, June 1985.
35. John C. Strikwerda and Young S. Lee, "The accuracy of the fractional step method," SIAM Journal on Numerical Analysis, vol. 37, no. 1, pp. 37 - 47, November 1999.
36. Kane S. Yee, "Numerical solution of inital boundary value problems involving maxwell's equations in isotropic media," IEEE Transactions on Antennas and Propagation, vol. 14, pp. 302 - 307, May 1966.
37. Taflove Allen and Hagness Susan C., Computational electrodynamics - The finite difference time-domain method, Norwood, MA: Aretch House Inc., 1996.
38. Altera Corporation, "http://www.altera.com/literature/," 2008.