20 GFLOPS QR processor on a Xilinx Virtex-E FPGA

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 4116, Issue , 2000, Pages 300-310

  Walke, Richardl ^a   Smith, R M ^a   Lightbody, Gaye ^a  

^a DEFENCE SCIENCE AND TECHNOLOGY LABORATORY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ANTENNA ARRAYS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; DIGITAL ARITHMETIC; MACROS; PARALLEL PROCESSING SYSTEMS; RADAR INTERFERENCE;

ADAPTIVE BEAMFORMING; RELATIONALLY PLACED MACROS (RPM); SMART ANTENNAS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0034505886     PISSN: 0277786X     EISSN: None     Source Type: Journal    
DOI: 10.1117/12.406508     Document Type: Article

References (0)