Computational RAM: Implementing processors in memory

IEEE Design and Test of Computers

Volumn 16, Issue 1, 1999, Pages 32-41

  Elliott, Duncan G ^a,f,g,h,i   Stumm, Michael ^b,i,j   Snelgrove, W Martin ^c,d,f,k   Cojocaru, Christian ^d,f,l   Mckenzie, Robert ^e  

^a UNIVERSITY OF ALBERTA   (Canada)

^b UNIVERSITY OF TORONTO   (Canada)

^c CARLETON UNIVERSITY   (Canada)

^d Philsar Electronics ^*  (Canada)

^e MOSAID Technologies   (Canada)

^f IEEE   (Canada)

^g IEEE ^*  (Canada)

^h Solid State Circuits Society   (Canada)

ⁱ ACM   (Canada)

^j IEEE

^k Wireless System Technologies

^l Philsar Electronics   (Canada)

more..

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL RAM;

COMPUTER AIDED DESIGN; COMPUTER GRAPHICS; DATABASE SYSTEMS; IMAGE PROCESSING; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS; SIGNAL PROCESSING;

RANDOM ACCESS STORAGE;

EID: 0032632125     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.748803     Document Type: Article

References (12)

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3. N. Yamashita et al., "A 3.84GIPS Integrated Memory Array Processor with 64 Processing Elements and 2Mb SRAM," IEEE J. Solid-State Circuits, Vol. 29, No. 11, Nov. 1994, pp. 1336-1343.
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12. D. Elliott, Computational RAM: A Memory-SIMD Hybrid, doctoral thesis, Univ. of Toronto, Dept. of Electrical and Computer Engineering, 1998.