Spacer double patterning technique for Sub-40nm DRAM manufacturing process development

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7140, Issue , 2008, Pages

  Shiu, Weicheng ^a   Ma, William ^a   Lee, Hong Wen ^a   Wu, Jan Shiun ^a   Tseng, Yi Min ^a   Tsai, Kevin ^a   Liao, Chun Te ^a   Wang, Aaron ^a   Yau, Alan ^a   Lin, Yi Ren ^a   Chen, Yu Lung ^a   Wang, Troy ^a   Wu, Wen Bin ^a   Shih, Chiang Lin ^a  

^a NANYA TECHNOLOGY CORPORATION   (Taiwan)

Author keywords

CD trimming; Double patterning; Self aligned; Sub 40nm

Indexed keywords

CD TRIMMING; DOUBLE PATTERNING; ETCH PROCESS; FEATURE SIZES; HIGH-DENSITY ARRAYS; HIGH-DENSITY MEMORIES; HIGH-INDEX FLUIDS; IMMERSION SCANNERS; LINE EDGE ROUGHNESS; MANUFACTURING PROCESS; MASS PRODUCTIONS; MEMORY ARRAYS; MOORE'S LAWS; NEXT GENERATION LITHOGRAPHIES; OPTICAL SYSTEM DESIGNS; PACKED ARRAYS; PHYSICAL LIMITATIONS; RESOLUTION ENHANCEMENT TECHNIQUES; RESOLUTION LIMITS; SELF-ALIGNED; SUB-40NM;

DATA STORAGE EQUIPMENT; DYNAMIC RANDOM ACCESS STORAGE; ELECTRON BEAM LITHOGRAPHY; EXTREME ULTRAVIOLET LITHOGRAPHY; FLASH MEMORY; LAWS AND LEGISLATION; OPTICAL SYSTEMS; PHOTORESISTS; PRODUCTION ENGINEERING; REFLECTIVE COATINGS; ROUGHNESS MEASUREMENT; TRIMMING;

SCANNING;

EID: 62449140626     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.804641     Document Type: Conference Paper

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