Patterning with spacer for expanding the resolution limit of current lithography tool

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6156, Issue , 2006, Pages

  Jung, Woo Yung ^a   Kim, Choi Dong ^a   Eom, Jae Doo ^a   Cho, Sung Yoon ^a   Jeon, Sung Min ^a   Kim, Jong Hoon ^a   Moon, Jae In ^a   Lee, Byung Seok ^a   Park, Sung Ki ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

CMP; Double Exposure; Nitride Spacer; Nitride Strip

Indexed keywords

CONTROLLABILITY; ELECTRIC INSULATORS; ETCHING; FLASH MEMORY; INTERCONNECTION NETWORKS; LITHOGRAPHY; NITRIDES; PROBLEM SOLVING;

CMP; DOUBLE EXPOSURE; NITRIDE SPACER; NITRIDE STRIP;

PATTERN RECOGNITION SYSTEMS;

EID: 33745795739     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.650991     Document Type: Conference Paper

References (1)

1. Won-Kwang Ma, "Double Exposure to Reduce Overall Line Width Variation of 80nm DRAM Gate" Proceedings of SPIE, Optical Microlithography SPIE, 5377(2004) pp.939-946