Uncovering hidden loop level parallelism in sequential applications

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2008, Pages 290-301

  Zhong, Hongtao ^a   Mehrara, Mojtaba ^a   Lieberman, Steve ^a   Mahlke, Scott ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATIONS; AUTOMATIC PROGRAMMING; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; COMPUTERS; COSINE TRANSFORMS; EMBEDDED SYSTEMS; PARALLEL PROGRAMMING;

AUTOMATIC PARALLELIZATION; CODE TRANSFORMATIONS; COMPUTING TECHNOLOGIES; CONTROL DEPENDENCES; DEPENDENCE ANALYSIS; DYNAMIC EXECUTIONS; FOUR CORES; LOOP LEVELS; MULTI-CORE SYSTEMS; NUMBER OF DATUMS; PARALLELIZATION; PERFORMANCE GAINS; SCIENTIFIC APPLICATIONS; SEQUENTIAL APPLICATIONS; SPEED-UP;

BENCHMARKING;

EID: 57749168614     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2008.4658647     Document Type: Conference Paper

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