The STAMPede approach to thread-level speculation

ACM Transactions on Computer Systems

Volumn 23, Issue 3, 2005, Pages 253-300

  Steffan, J Gregory ^a   Colohan, Christopher ^b,d   Zhai, Antonia ^c,e   Mowry, Todd C ^b,d  

^a UNIVERSITY OF TORONTO   (Canada)

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c UNIVERSITY OF MINNESOTA   (United States)

^d Carnegie Mellon University   (United States)

^e University of Minnesota   (United States)

Author keywords

Automatic parallelization; Cache coherence; Chip multiprocessing; Thread level speculation

Indexed keywords

AUTOMATIC PARALLELIZATION; CACHE COHERENCE; CHIP-MULTIPROCESSING; THREAD-LEVEL SPECULATION;

COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; COMPUTER SYSTEMS; MULTITASKING; PROBLEM SOLVING;

MICROPROCESSOR CHIPS;

EID: 33745198176     PISSN: 07342071     EISSN: 07342071     Source Type: Journal    
DOI: 10.1145/1082469.1082471     Document Type: Article

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