Decoupling-capacitor planning and sizing for noise and leakage reduction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 11, 2007, Pages 2023-2034

  Wong, Eric ^a,b   Minz, Jacob Rajkumar ^a,c   Lim, Sung Kyu ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b Universal Avionics Systems Corporation   (United States)

^c SYNOPSYS INC   (United States)

Author keywords

Decoupling capacitors (decaps); Floorplanning; Power supply integrity

Indexed keywords

DECOUPLING CAPACITORS (DECAPS); DEVICE LAYERS; FLOORPLANNING; FUNCTIONAL BLOCKS; GENERALIZED NETWORKS; LEAKAGE POWER; LEAKAGE REDUCTIONS; OXIDE THICKNESS; POWER-SUPPLY INTEGRITY; REDUCING POWER; WIRE LENGTHS;

CAPACITORS; INTEGRATED CIRCUITS; THREE DIMENSIONAL;

CAPACITANCE;

EID: 57649175424     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2007.906463     Document Type: Article

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