Controlled two-step solid-phase crystallization for high-performance polysilicon TFT's

IEEE Electron Device Letters

Volumn 18, Issue 8, 1997, Pages 378-381

  Subramanian, Vivek ^a   Dankoski, Paul ^a   Degertekin, Levent ^a   Khuri Yakub, Butrus T ^a   Saraswat, Krishna C ^a  

^a Stanford University ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACOUSTIC TRANSDUCERS; ANNEALING; CRYSTALLIZATION; GRAIN GROWTH; NUCLEATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE;

SOLID PHASE CRYSTALLIZATION;

THIN FILM TRANSISTORS;

EID: 0031207513     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.605445     Document Type: Article

References (13)

1. A. Mimura, N. Konishi, K. Ono, J.-I. Ohwada, Y. Hosokawa, Y. A. Ono, T. Suzuki, K. Miyata, and H. Kawakami, "High-performance low-temperature poly-Si n-channel TFT's for LCD's," IEEE Trans. Electron Devices, vol. 36, p. 418, Feb. 1989.
2. S. D. S. Malhi, H. Shichijo, S. K. Banerjee, R. Sunderesan, M. Elehy, G. P. Pollack, W. F. Richardson, A. H. Shah, L. R. Hite, R. Womack, P. K. Chatterjee, and H. W. Lam, "Characteristics and three-dimensional integration of MOSFET's in small-grain LPCVD polycrystalline silicon," IEEE Trans. Electron Devices, vol. ED-32, p. 258, Feb. 1985.
3. M. K. Hatalis and D. W. Greve, "High-performance thin-film transistors in low-temperature crystallized LPCVD amorphous silicon films," IEEE Electron Device Lett., vol. EDL-8, p. 361, Aug. 1987.
4. _, "Large grain polycrystalline silicon by low-temperature annealing of low-pressure chemical vapor deposited amorphous silicon films," J. Appl. Phys., vol. 63, p. 2260, 1988.
5. M. Bonnel, N. Duhamel, M. Guendouz, L. Haji, B. Loisel, and P. Ruault, "Poly-Si thin-film transistors fabricated with rapid thermal-annealed silicon films," Jpn. J. Appl. Phys., vol. 30, no. 11B, p. L1924, 1991.
6. F. L.. Degertekin, J. Pei, B. T. Khuri-Yakub, and K. C. Saraswat, "In situ acoustic temperature tomography of semiconductor wafers," Appl. Phys. Lett., vol. 64, no. 11, p. 1338, 1994.
7. V. Subramanian, F. L. Degertekin, P. Dankoski, B. T. Khuri-Yakub, and K. C. Saraswat, "A novel technique for in situ monitoring of crystallinity and temperature during rapid thermal annealing of thin Si/Si-Ge films on quartz/glass," in Proc. Mater. Res. Soc. 1996 Spring Meet., Flat-Panel Display Mater., San Francisco, CA, to be published.
8. N. Yamauchi and R. Reif, "Polycrystalline silicon thin films processed with silicon ion implantation and subsequent sold-phase crystallization: Theory, experiments, and thin-film transistor applications," J. Appl. Phys., vol. 75, no. 7, p. 3235, 1994.
9. K. Zellama, P. Germain, S. Squelard, J. C. Bourgoin, and P. A. Thomas, "Crystallization in amorphous silicon," J. Appl. Phys., vol. 50, no. 11, p. 6995, 1979.
10. J. Fair, J. Mehlhaff, R. Fulks, and I.-W. Wu, "Rapid thermal processing for flat-panel displays," in Int. Flat-Panel Display Conf., SEMI-CON/WEST, 1992, p. A109.
11. V. Subramanian and K. Saraswat, unpublished results, 1996.
12. K-S. Nam, Y-H. Song, J-T. Back, H-J. Kong, and S-S. Lee, "Thin-film transistors with polycrystalline silicon prepared by a new annealing method," Jpn. J. Appl. Phys., vol. 32, no, 5A, p. 1908, 1993.
13. K. C. Saraswat, P. P. Apte, L. Booth, Y. Chen, P. C. P. Dankoski, F. L. Degertekin, G. F. Franklin, B. T. Khuri-Yakub, M. M. Moslehi, C. Schaper, P. J. Gyugi, Y. J. Lee, J. Pei, and S. C. Wood, "Rapid thermal multiprocessing for a programmable factory for adaptive manufacturing of IC's," IEEE Trans. Semiconduct. Manufact., vol. 7, p. 159, Feb. 1994.