Methodology for the placement and optimization of decoupling capacitors for gigahertz systems

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2000, Pages 156-161

  Choi, J ^a   Chun, S ^a   Na, N ^a   Swaminathan, M ^a   Smith, L ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER SIMULATION; ELECTRIC IMPEDANCE; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; PRINTED CIRCUIT BOARDS;

DECOUPLING CAPACITORS; GIGAHERTZ SYSTEM; POWER DELIVERY SYSTEM;

CAPACITORS;

EID: 0033878239     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)