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Volumn 1, Issue , 2004, Pages 41-48

Physical layout automation for system-on-packages

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN ALGORITHMS; INTER-LAYER WIRES; MIXED SIGNALS; SYSTEM-ON-PACKAGE (SOP); THREE-DIMENSIONAL (3D) ROUTING;

EID: 10444236433     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (11)

References (20)
  • 2
    • 0034819418 scopus 로고    scopus 로고
    • Interconnect characteristics of 2.5-D system integration scheme
    • Y. Deng and W. Maly, "Interconnect characteristics of 2.5-D system integration scheme," Int. Symposium on Physical Design, 2001.
    • (2001) Int. Symposium on Physical Design
    • Deng, Y.1    Maly, W.2
  • 3
    • 0002701738 scopus 로고    scopus 로고
    • Fast evaluation of sequence pair in block placement by longest common subsequence computation
    • Xiaoping Tang, Ruiqi Tian, D.F. Wong, "Fast Evaluation of Sequence Pair in Block Placement by Longest Common Subsequence Computation," Design, Automation and Test in Europe Conference, 2000. pp 106-111.
    • (2000) Design, Automation and Test in Europe Conference , pp. 106-111
    • Tang, X.1    Tian, R.2    Wong, D.F.3
  • 4
    • 0030378255 scopus 로고    scopus 로고
    • VLSI module placement based on rectangle-packing by the sequence pair
    • H. Murata, K. Fujiyoshi, et al., "VLSI module placement based on rectangle-packing by the sequence pair," IEEE Transaction on CAD, vol. 15:12, pp. 1518-1524, 1996.
    • (1996) IEEE Transaction on CAD , vol.15 , Issue.12 , pp. 1518-1524
    • Murata, H.1    Fujiyoshi, K.2
  • 6
    • 0031705566 scopus 로고    scopus 로고
    • Efficient algorithms for the minimum shortest path steiner arborescence problem with applications to VLSI physical design
    • January
    • J. Cong, A.B. Kahng, K Leung, "Efficient Algorithms for the Minimum Shortest Path Steiner Arborescence Problem with Applications to VLSI Physical Design," IEEE Trans. on CAD, vol. 17, no.1, January 1998.
    • (1998) IEEE Trans. on CAD , vol.17 , Issue.1
    • Cong, J.1    Kahng, A.B.2    Leung, K.3
  • 7
    • 0029392776 scopus 로고
    • An efficient multilayer MCM router based on four-via routing
    • Oct.
    • Khoo and J. Cong, "An efficient multilayer MCM router based on four-via routing," IEEE Trans. Computer-Aided Design, Oct. 1995, vol. 14, pp. 1277-90
    • (1995) IEEE Trans. Computer-aided Design , vol.14 , pp. 1277-1290
    • Khoo1    Cong, J.2
  • 11
    • 0347409236 scopus 로고    scopus 로고
    • Efficient thermal placement of standard cells in 3D ICs using a force directed approach
    • Brent A. Goplen, Sachin S. Sapatnekar, "Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach", Proc. Int. Conf. on Computer Aided Design, 2003.
    • (2003) Proc. Int. Conf. on Computer Aided Design
    • Goplen, B.A.1    Sapatnekar, S.S.2
  • 12
  • 13
    • 0034846666 scopus 로고    scopus 로고
    • Exploring SOI device structures and interconnect architectures for 3-dimensional integration
    • Rongtian Zhang, Kaushik Roy, Cheng-Kok Koh, and David B. Janes, "Exploring SOI Device Structures and Interconnect Architectures for 3-Dimensional Integration," Proc. 2001 Design Automation Conference, 2001.
    • (2001) Proc. 2001 Design Automation Conference
    • Zhang, R.1    Roy, K.2    Koh, C.-K.3    Janes, D.B.4
  • 19
    • 1642336365 scopus 로고    scopus 로고
    • Edge separability based circuit clustering with application to multi-level circuit partitioning
    • March
    • Jason Cong and Sung Kyu Lim, "Edge Separability based Circuit Clustering With Application to Multi-level Circuit Partitioning", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 23, No. 3, March 2004, pp 1-12.
    • (2004) IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems , vol.23 , Issue.3 , pp. 1-12
    • Cong, J.1    Lim, S.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.