Automatic extraction methodology for accurate measurements of effective channel length on 65-nm MOSFET technology and below

IEEE Transactions on Semiconductor Manufacturing

Volumn 21, Issue 4, 2008, Pages 504-512

  Fleury, Dominique ^a,b   Cros, Antoine ^a   Romanjek, Krunoslav ^c,d   Roy, David ^a   Perrier, Franck ^c,e   Dumont, Benjamin ^a   Brut, Hugues ^a   Ghibaudo, Gérard ^b  

^a STMICROELECTRONICS   (France)

^b MINATEC   (France)

^c NXP SEMICONDUCTORS   (Netherlands)

^d CEA LETI   (France)

^e SOFRADIR   (France)

Author keywords

Automatic testing; Capacitance; Channel length; Length measurement; MOSFETs; Parameter estimation

Indexed keywords

AUTOMATIC TESTING; CAPACITANCE; ELECTRONIC EQUIPMENT TESTING; MOSFET DEVICES; PARAMETER ESTIMATION; RELIABILITY; THICKNESS MEASUREMENT;

ACCURATE CHANNELS; ACCURATE MEASUREMENTS; AUTOMATIC EXTRACTIONS; CHANNEL LENGTH; CHANNEL LENGTHS; CHANNEL MEASUREMENTS; CIRCUIT DESIGNS; EFFECTIVE CHANNEL LENGTHS; EXPERIMENTAL STUDIES; EXTRACTION ACCURACIES; HOT CARRIER INJECTIONS; IN LINES; LENGTH MEASUREMENT; LIFE-TIMES; MOSFET CHANNELS; MOSFETS; PARASITIC CAPACITANCES; SEMICONDUCTOR MANUFACTURING;

CHANNEL ESTIMATION;

EID: 55649092692     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2008.2004316     Document Type: Conference Paper

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