Modeling of pocket implanted MOSFETs for anomalous analog behavior

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1999, Pages 171-174

  Cao, Kanyu Mark ^a   Liu, Weidong ^a   Jin, Xiaodong ^a   Vasanth, Karthik ^a   Green, Keith ^a   Krick, John ^a   Vrotsos, Tom ^a   Hu, Chenming ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC RESISTANCE; EQUIVALENT CIRCUITS; MOSFET DEVICES; SEMICONDUCTOR DEVICE STRUCTURES; THRESHOLD VOLTAGE;

CMOS TECHNOLOGY; DRAIN INDUCED BARRIER LOWERING REGIONS; DRAIN INDUCED THRESHOLD VOLTAGE SHIFT; EARLY VOLTAGE; POCKET IMPLANT; SHORT CHANNEL EFFECTS; SOFTWARE PACKAGE SPICE;

SEMICONDUCTOR DEVICE MODELS;

EID: 0033325337     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)