Using spike-anneal to reduce interfacial layer thickness and leakage current in metal-oxide-semiconductor devices with TaN/atomic layer deposition-grown HfAlO/chemical oxide/Si structure

Japanese Journal of Applied Physics

Volumn 47, Issue 4 PART 2, 2008, Pages 2438-2441

  Tsai, Bo An ^b   Lee, Yao Jen ^a   Peng, Hsin Yi ^a   Tzeng, Pei Jer ^c   Luo, Chih Wei ^b   Chang Liao, Kuei Shu ^d  

^a NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^d NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

ALD; Chemical oxide; HfAlO; HNO3; Spike annealing

Indexed keywords

ANNEALING; DIELECTRIC DEVICES; ELECTRIC CONDUCTIVITY; INDICATORS (CHEMICAL); MOS DEVICES; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DEVICES; SEMICONDUCTOR MATERIALS; SILICON; SILICON COMPOUNDS;

ALD; CHEMICAL OXIDE; HFALO; HNO3; SPIKE-ANNEALING;

LEAKAGE CURRENTS;

EID: 54249152376     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.47.2438     Document Type: Article

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