Achieving conduction band-edge effective work functions by La2O3 capping of hafnium silicates

IEEE Electron Device Letters

Volumn 28, Issue 6, 2007, Pages 486-488

  Ragnarsson, Lars Åke ^a   Chang, Viincent S ^b   Yu, Hong Yu ^a   Cho, Hag Ju ^c   Conard, Thierry ^a   Yin, Kai Min ^b   Delabie, Annelies ^a   Swerts, Johan ^d   Schram, Tom ^a   De Gendt, Stefan ^a,e   Biesemans, Serge ^a  

^a IMEC   (Belgium)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^c SAMSUNG Electronics   (South Korea)

^d ASM BELGIUM   (Belgium)

^e UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Atomic layer deposition (ALD); Electron mobility; Hafnium oxide; Lanthanum oxide; MOSFETs; Sputtering; Tantalum carbide; Titanium nitride; Work function

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRON MOBILITY; HAFNIUM COMPOUNDS; LANTHANUM COMPOUNDS; MOSFET DEVICES; NITRIDATION; TANTALUM CARBIDE; TITANIUM NITRIDE; WORK FUNCTION;

ATOMIC LAYER DEPOSITION (ALD); EQUIVALENT OXIDE THICKNESS (EOT); HAFNIUM OXIDE; LANTHANUM OXIDE;

CONDUCTION BANDS;

EID: 34249804177     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2007.896900     Document Type: Article

References (25)

1. International Technology Roadmap for Semiconductors (ITRS). Online. Available: http://www.itrs.net/
2. J. Schaeffer, C. Capasso, L. Fonseca, S. Samavedam, D. Gilmer, Y. Liang, S. Kalpat, B. Adetutu, H.-H. Tseng, Y. Shiho, A. Demkov, R. Hegde, W. Taylor, R. Gregory, J. Jiang, E. Luckowski, M. Raymond, K. Moore, D. Triyoso, D. Roan, B. White, Jr., and P. Tobin, "Challenges for the integration of metal gate electrodes," in IEDM Tech. Dig., 2004, pp. 287-290.
3. H. Wen, H. Alshareef, H. Luan, K. Choi, P. Lysaght, H. Harris, C. Huffman, G. Brown, G. Bersuker, P. Zeitzoff, H. Huff, P. Majhi, and B. Lee, "Systematic investigation of amorphous transition-metal-siliconnitride electrodes for metal gate CMOS applications," in VLSI Symp. Tech. Dig., 2005, pp. 46-47.
4. H. Y. Yu, C. Ren, Y.-C. Yeo, J. F. Kang, X. P. Wang, H. H. H. Ma, M.-F. Li, D. S. H. Chan, and D.-L. Kwong, "Fermi pinning-induced thermal instability of metal-gate work functions," IEEE Electron Device Lett., vol. 25, no. 5, pp. 337-339, May 2004.
5. H.-S. Jung, S. K. Han, H. Lim, Y.-S. Kim,M. J. Kim,M. Y. Yu, C.-K. Lee, M.-S. Lee, Y.-S. You, Y. Chung, S. Kim, H. S. Baik, J.-H. Lee, N.-I. Lee, and H.-K. Kang, "Dual high-κ gate dielectric technology using selective AlOx/etch (SAE) process with nitrogen and fluorine incorporation," in VLSI Symp. Tech. Dig., 2006, pp. 162-163.
6. S. C. Song, Z. B. Zhang, M. M. Hussain, C. Huffman, J. Barnett, S. H. Bae, H. J. Li, P. Majhi, C. S. Park, B. S. Ju, H. K. Park, C. Y. Kang, R. Choi, P. Zeitzoff, H. H. Tseng, B. H. Lee, and R. Jammy, "Highly manufacturable 45 nm LSTP CMOSFETs using novel dual high-κ and dual metal gate CMOS integration," in VLSI Symp. Tech. Dig., 2006, pp. 13-14.
7. 3 dielectric cap and nitridation on device performance, scalability and reliability for advanced high-κ/metal gate pMOSFET applications," IEEE Trans. Electron Devices. submitted for publication.
8. H. N. Alshareef, H. F. Luan, K. Choi, H. R. Harris, H. C. Wen, M. A. Quevedo-Lopez, P. Majhi, and B. H. Lee, "Metal gate work function engineering using AlNχ interfacial layers," Appl. Phys. Lett., vol. 88, no. 11, pp. 112114-1-112114-3, Mar. 2006.
9. 3) into HfO:2 n-MOSFETs," IEEE Electron Device Lett., vol. 27, no. 8, pp. 640-643, Aug. 2006.
10. V. Narayanan, V. K. Paruchuri, N. A. Bojarczuk, B. P. Linder, Y. H. K. B. Doris, S. Zafar, J. Stathis, S. Brown, J. Arnold, M. Copel, M. Steen, E. Cartier, A. Callegari, P. Jamison, J. P. Locquet, D. L. Lacey, Y. Wang, P. E. Batson, P. Ronsheim, R. Jammy, M. P. Chudzik, M. Ieong, S. Guha, G. Shahidi, and T. C. Chen, "Band-edge high-performance high-κ/metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyond," in VLSI Symp. Tech. Dig., 2006, pp. 224-225.
11. H. Alshareef, M. Quevedo-Lopez, H. Wen, R. Harris, P. Kirsch, P. Majhi, B. Lee, R. Jammy, D. Lichtenwalner, J. Jur, and A. Kingon, "Work function engineering using lanthanum oxide interfacial layers," Appl. Phys. Lett., vol. 89, no. 23, pp. 232103-1-232103-3, Dec. 2006.
12. F. De Smedt, C. Vinckier, I. Cornelissen, S. De Gendt, and M. Heyns, "A detailed study of the growth of thin oxide layers on silicon using ozonated solutions," J. Electrochem. Soc., vol. 147, no. 3, pp. 1124-1129, Mar. 2000.
13. PULSAR is a trademark of ASM International nv., The Netherlands.
14. 2O," Electrochem. Solid-State Lett., vol. 10, no. 5, pp. H149-H152, 2007.
15. A. Delabie, G. Pourtois, M. Caymax, S. De Gendt, L.-Å. Ragnarsson, Y. Fedorenko, J. Swerts, and J. W. Maes, "Atomic layer deposition of hafnium silicate gate dielectric layers," J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 25, no. 4, Jul. 2007.
16. M. Nieminen, M. Putkonen, and L. Niinisto, "Formation and stability of lanthanum oxide thin films deposited from β-diketonate precursor," Appl. Surf. Sci., vol. 174, no. 2, pp. 155-165, Apr. 2001.
17. J. L. Everaert, T. Conard, and M. Schaekers, "SiON gate dielectric formation by rapid thermal oxidation of nitrided Si," in Proc. 13th IEEE Int. Conf. Adv. Thermal Process. Semicond., 2005, pp. 135-138.
18. 4 as precursor," presented at the AVS 6th Int. Conf. Atomic Layer Deposition, Seoul, Korea, Jul. 24-26, 2006.
19. T. Schram, in preparation.
20. Hauser CV Analysis Program, version 5.0. Online. Available: http://www.nnf.ncsu.edu/testing
21. S. I. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFETs: Part I - Effects of substrate impurity concentration," IEEE Trans. Electron Devices, vol. 41, no. 12, pp. 2357-2362, Dec. 1994.
22. H. Irie, K. Kita, K. Kyuno, and A. Toriumi, "Re-investigation of MOS inversion layer mobility from non-universality and possible new scattering mechanism aspects," in IEDM Tech. Dig., 2003, pp. 19.1.1-19.1.4.
23. 3 thin films grown on TiN/Si substrates via atomic layer deposition," Appl. Surf. Sci., vol. 252, no. 24, pp. 8506-8509, 2006.
24. 2/TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions," IEEE Trans. Electron Devices, vol. 53, no. 7, pp. 1657-1668, Jul. 2006.
25. R. L. Opila, G. D. Wilk, M. A. Alam, R. B. van Dover, and B. W. Busch, "Photoemission study of Zr- and Hf-silicates for use as high-κ oxides: Role of second nearest neighbors and interface charge," Appl. Phys. Lett., vol. 81, no. 10, pp. 1788-1790, Sep. 2002.