Threshold voltage shift instability induced by plasma charging damage in MOSFETs with high-K Dielectric

Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT

Volumn , Issue , 2008, Pages 97-100

  Eriguchi, K ^a   Kamei, M ^a   Okada, K ^b   Ohta, H ^a   Ono, K ^a  

^a KYOTO UNIVERSITY   (Japan)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

Charging; Constant current stress; High k; Plasma induced damage; SiO2; Threshold voltage; Trap

Indexed keywords

ELECTRONICS INDUSTRY; HAFNIUM; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUITS; MOSFET DEVICES; PLASMA DIAGNOSTICS; PLASMAS; TECHNOLOGY; THRESHOLD VOLTAGE;

CHARGING; CONSTANT CURRENT STRESS; HIGH-K; HIGH-K DIELECTRICS; HIGH-K GATE STACKS; INTEGRATED CIRCUIT DESIGN; INTERNATIONAL CONFERENCES; MOSFETS; P-CHANNEL; PLASMA CHARGING DAMAGE; PLASMA-INDUCED DAMAGE; SIO2; THRESHOLD VOLTAGE SHIFTS; TRAP;

PLASMA STABILITY;

EID: 51849140426     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICICDT.2008.4567255     Document Type: Conference Paper

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