Low-temperature, strong SiO 2-SiO 2 covalent wafer bonding for III-V compound semiconductors-to-silicon photonic integrated circuits

Journal of Electronic Materials

Volumn 37, Issue 10, 2008, Pages 1552-1559

  Liang, Di ^a   Fang, Alexander W ^a   Park, Hyundai ^a   Reynolds, Tom E ^a   Warner, Keith ^b   Oakley, Douglas C ^b   Bowers, John E ^a  

^a University of California   (United States)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Compound semiconductors; Hybrid integration; Photonic integrated circuits; Silicon on insulator; Wafer bonding

Indexed keywords

COMPOUND SEMICONDUCTORS; COVALENT BONDING; HYBRID INTEGRATION; LOW TEMPERATURES; LOW-TEMPERATURE PROCESSING; PHOTONIC INTEGRATED CIRCUITS; SILICON-ON-INSULATOR; WAFER BONDING;

SILICON COMPOUNDS;

EID: 51849093063     PISSN: 03615235     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11664-008-0489-1     Document Type: Article

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