-
1
-
-
15844407150
-
Benchmarking nanotechnology for high-performance and low-power logic transistor applications
-
Mar
-
R. Chau, S. Datta, A. M. Doczy, B. Doyle, B. Jin, J. Kavalieros, A. Majumdar, M. Metz, and M. Radosavljevic, "Benchmarking nanotechnology for high-performance and low-power logic transistor applications," IEEE Trans. Nanotechnol., vol. 4, no. 2, pp. 153-158, Mar. 2005.
-
(2005)
IEEE Trans. Nanotechnol
, vol.4
, Issue.2
, pp. 153-158
-
-
Chau, R.1
Datta, S.2
Doczy, A.M.3
Doyle, B.4
Jin, B.5
Kavalieros, J.6
Majumdar, A.7
Metz, M.8
Radosavljevic, M.9
-
2
-
-
50249185641
-
-
K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C.-H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hattendorf, J. He, J. Hicks, R. Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pae, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Shifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. Troeger, P. Vandervoorn, S.Williams, and K. Zawadzki, A 45 nm logic technology with high-κ+metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging, in IEDM Tech. Dig, 2007, pp. 247-250
-
K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C.-H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hattendorf, J. He, J. Hicks, R. Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pae, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Shifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. Troeger, P. Vandervoorn, S.Williams, and K. Zawadzki, "A 45 nm logic technology with high-κ+metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging," in IEDM Tech. Dig., 2007, pp. 247-250.
-
-
-
-
3
-
-
50249111563
-
Impact of flash annealing on performance and reliability of high-K/metal-gate MOSFETs for sub-45 nm CMOS
-
P. Kalra, P. Majhi, D. Heh, G. Bersuker, C. Young, N. Vora, R. Harris, P. Kirsch, R. Choi, M. Chang, J. Lee, H. Hwang, H.-H. Tseng, R. Jammy, and T.-J. King Liu, "Impact of flash annealing on performance and reliability of high-K/metal-gate MOSFETs for sub-45 nm CMOS," in IEDM Tech. Dig., 2007, pp. 353-356.
-
(2007)
IEDM Tech. Dig
, pp. 353-356
-
-
Kalra, P.1
Majhi, P.2
Heh, D.3
Bersuker, G.4
Young, C.5
Vora, N.6
Harris, R.7
Kirsch, P.8
Choi, R.9
Chang, M.10
Lee, J.11
Hwang, H.12
Tseng, H.-H.13
Jammy, R.14
King Liu, T.-J.15
-
4
-
-
50249114076
-
Extendibility of NiPt silicide contacts for CMOS technology demonstrated to the 22-nm node
-
K. Ohuchi, C. Lavoie, C. Murray, C. D'Emic, I. Lauer, J. O. Chu, B. Yang, P. Besser, L. Gignac, J. Bruley, G. U. Singco, F. Pagette, A. W. Topol, M. J. Rooks, J. J. Bucchignano, V. Narayanan, M. Khare, M. Takayanagi, K. Ishimaru, D.-G. Park, G. Shahidi, and P. Solomon, "Extendibility of NiPt silicide contacts for CMOS technology demonstrated to the 22-nm node," in IEDM Tech. Dig., 2007, pp. 1029-1031.
-
(2007)
IEDM Tech. Dig
, pp. 1029-1031
-
-
Ohuchi, K.1
Lavoie, C.2
Murray, C.3
D'Emic, C.4
Lauer, I.5
Chu, J.O.6
Yang, B.7
Besser, P.8
Gignac, L.9
Bruley, J.10
Singco, G.U.11
Pagette, F.12
Topol, A.W.13
Rooks, M.J.14
Bucchignano, J.J.15
Narayanan, V.16
Khare, M.17
Takayanagi, M.18
Ishimaru, K.19
Park, D.-G.20
Shahidi, G.21
Solomon, P.22
more..
-
5
-
-
50249121118
-
High performance 60 nm gate length germanium p-MOSFETs with Ni germanide metal source/drain
-
T. Yamamoto, Y. Yamashita, M. Harada, N. Taoka, K. Ikeda, K. Suzuki, O. Kiso, N. Sugiyama, and S.-I. Takagi, "High performance 60 nm gate length germanium p-MOSFETs with Ni germanide metal source/drain," in IEDM Tech. Dig., 2007, pp. 1041-1043.
-
(2007)
IEDM Tech. Dig
, pp. 1041-1043
-
-
Yamamoto, T.1
Yamashita, Y.2
Harada, M.3
Taoka, N.4
Ikeda, K.5
Suzuki, K.6
Kiso, O.7
Sugiyama, N.8
Takagi, S.-I.9
-
6
-
-
37549024971
-
1-x-Si quantum wells with high-κ/metal-gate stacks
-
Jan
-
1-x-Si quantum wells with high-κ/metal-gate stacks," IEEE Electron Device Lett., vol. 29, no. 1, pp. 99-101, Jan. 2008.
-
(2008)
IEEE Electron Device Lett
, vol.29
, Issue.1
, pp. 99-101
-
-
Majhi, P.1
Kalra, P.2
Harris, R.3
Choi, K.J.4
Heh, D.5
Oh, J.6
Kelly, D.7
Choi, R.8
Cho, B.J.9
Banerjee, S.10
Tsai, W.11
Tseng, H.12
Jammy, R.13
-
7
-
-
37549063505
-
T with high-K/metal gates featured in a dual channel CMOS integration scheme
-
T with high-K/metal gates featured in a dual channel CMOS integration scheme," in VLSI Symp. Tech. Dig. 2007, pp. 154-155.
-
(2007)
VLSI Symp. Tech. Dig
, pp. 154-155
-
-
Harris, H.R.1
Kalra, P.2
Majhi, P.3
Hussain, M.4
Kelly, D.5
Oh, J.6
Hew, D.7
Smith, C.8
Barnett, J.9
Kirsch, P.D.10
Gebara, G.11
Jur, J.12
Lichtenwalner, D.13
Lubow, A.14
Ma, T.P.15
Sung, G.16
Thompson, S.17
Lee, B.H.18
Tseng, H.-H.19
Jammy, R.20
more..
-
8
-
-
21544464728
-
1-x/Si strained-layer heterostructure
-
Aug
-
1-x/Si strained-layer heterostructure," Appl. Phys. Lett., vol. 47, no. 3, pp. 322-324, Aug. 1985.
-
(1985)
Appl. Phys. Lett
, vol.47
, Issue.3
, pp. 322-324
-
-
People, R.1
Bean, J.C.2
-
9
-
-
33750687578
-
High performance germanium MOSFETs
-
Dec
-
K. Saraswat, C. O. Chui, T. Krishnamohan, D. Kim, A. Nayfeh, and A. Pethe, "High performance germanium MOSFETs," Mater. Sci. Eng. B, vol. 135, no. 3, pp. 242-249, Dec. 2005.
-
(2005)
Mater. Sci. Eng. B
, vol.135
, Issue.3
, pp. 242-249
-
-
Saraswat, K.1
Chui, C.O.2
Krishnamohan, T.3
Kim, D.4
Nayfeh, A.5
Pethe, A.6
-
10
-
-
84944375335
-
SiGe-channel heterojunction p-MOSFETs
-
Jan
-
S. Verdonckt-Vandebroek, E. F. Crabbe, B. S. Meyerson, D. L. Harame, P. J. Restle, J. M. C. Stork, and J. B. Johnson, "SiGe-channel heterojunction p-MOSFETs," IEEE Trans. Electron Devices, vol. 41, no. 1, pp. 90-101, Jan. 1994.
-
(1994)
IEEE Trans. Electron Devices
, vol.41
, Issue.1
, pp. 90-101
-
-
Verdonckt-Vandebroek, S.1
Crabbe, E.F.2
Meyerson, B.S.3
Harame, D.L.4
Restle, P.J.5
Stork, J.M.C.6
Johnson, J.B.7
-
11
-
-
1142304509
-
Fabrication of 50 nm high performance strained-SiGe pMOSFETs with selective epitaxial growth
-
Mar
-
R. Loo, N. Collaert, P. Verheyen, M. Caymax, R. Delhougne, and K. D. Meyer, "Fabrication of 50 nm high performance strained-SiGe pMOSFETs with selective epitaxial growth," Appl. Surf. Sci., vol. 224, no. 1-4, pp. 292-296, Mar. 2004.
-
(2004)
Appl. Surf. Sci
, vol.224
, Issue.1-4
, pp. 292-296
-
-
Loo, R.1
Collaert, N.2
Verheyen, P.3
Caymax, M.4
Delhougne, R.5
Meyer, K.D.6
-
12
-
-
0030287491
-
x quantum well p-MOSFETs
-
Nov
-
x quantum well p-MOSFETs," IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 1965-1971, Nov. 1996.
-
(1996)
IEEE Trans. Electron Devices
, vol.43
, Issue.11
, pp. 1965-1971
-
-
Bhaumik, K.1
Shacham-Diamand, Y.2
Noel, J.-P.3
Bevk, J.4
Feldman, L.C.5
-
13
-
-
50649084959
-
-
J. R. Hauser, CVC 1996 NCSU Software. Raleigh, NC: Dept. Elect. Comput. Eng., North Carolina State Univ.
-
J. R. Hauser, CVC 1996 NCSU Software. Raleigh, NC: Dept. Elect. Comput. Eng., North Carolina State Univ.
-
-
-
-
14
-
-
34547868818
-
A unified model for gate capacitance-voltage characteristics and extraction of parameters of Si/ SiGe heterostructure pMOSFETs
-
Aug
-
B. Bindu, N. DasGupta, and A. DasGupta, "A unified model for gate capacitance-voltage characteristics and extraction of parameters of Si/ SiGe heterostructure pMOSFETs," IEEE Trans. Electron Devices, vol. 54, no. 8, pp. 1889-1896, Aug. 2007.
-
(2007)
IEEE Trans. Electron Devices
, vol.54
, Issue.8
, pp. 1889-1896
-
-
Bindu, B.1
DasGupta, N.2
DasGupta, A.3
-
15
-
-
34249078331
-
Interrelationship between electrical and physical properties of subcritical Si-Ge layers grown directly on Silicon for short channel high-performance pMOSFETs
-
Sep
-
D. Q. Kelly, S. Lee, P. Kalra, R. Harris, J. Oh, P. Kirsch, S. K. Banerjee, P. Majhi, H. Tseng, and R. Jammy, "Interrelationship between electrical and physical properties of subcritical Si-Ge layers grown directly on Silicon for short channel high-performance pMOSFETs," Microelectron. Eng., vol. 84, no. 9/10, pp. 2054-2057, Sep. 2007.
-
(2007)
Microelectron. Eng
, vol.84
, Issue.9-10
, pp. 2054-2057
-
-
Kelly, D.Q.1
Lee, S.2
Kalra, P.3
Harris, R.4
Oh, J.5
Kirsch, P.6
Banerjee, S.K.7
Majhi, P.8
Tseng, H.9
Jammy, R.10
-
16
-
-
0031382110
-
Intrinsic leakage in low power deep submicron CMOS ICs
-
A. Keshavarzi, K. Roy, and C. F. Hawkins, "Intrinsic leakage in low power deep submicron CMOS ICs," in Proc. IEEE Int. Test Conf., 1997, pp. 146-155.
-
(1997)
Proc. IEEE Int. Test Conf
, pp. 146-155
-
-
Keshavarzi, A.1
Roy, K.2
Hawkins, C.F.3
-
17
-
-
46049102429
-
Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT = 0.9 nm with excellent carrier mobility and high temperature stability
-
P. D. Kirsch, M. A. Quevedo-Lopez, S. A. Krishnan, C. Krug, H. AlShareef, C. S. Park, R. Harris, N. Moumen, A. Neugroschel, G. Bersuker, B. H. Lee, J. G. Wang, G. Pant, B. E. Gnade, M. J. Kim, R. M. Wallace, J. S. Jur, D. J. Lichtenwalner, A. I. Kingon, and R. Jammy, "Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT = 0.9 nm with excellent carrier mobility and high temperature stability," in IEDM Tech. Dig., 2006, pp. 629-632.
-
(2006)
IEDM Tech. Dig
, pp. 629-632
-
-
Kirsch, P.D.1
Quevedo-Lopez, M.A.2
Krishnan, S.A.3
Krug, C.4
AlShareef, H.5
Park, C.S.6
Harris, R.7
Moumen, N.8
Neugroschel, A.9
Bersuker, G.10
Lee, B.H.11
Wang, J.G.12
Pant, G.13
Gnade, B.E.14
Kim, M.J.15
Wallace, R.M.16
Jur, J.S.17
Lichtenwalner, D.J.18
Kingon, A.I.19
Jammy, R.20
more..
-
18
-
-
33745138556
-
Low defect ultra-thin fully strained-GeMOSFET on relaxed Si with high mobility and low band-to-band-tunneling (BTBT)
-
T. Krishnamohan, Z. Krivokapic, K. Uchida, Y. Nishi, and K. C. Saraswat, "Low defect ultra-thin fully strained-GeMOSFET on relaxed Si with high mobility and low band-to-band-tunneling (BTBT)," in VLSI Symp. Tech. Dig., 2005, pp. 82-83.
-
(2005)
VLSI Symp. Tech. Dig
, pp. 82-83
-
-
Krishnamohan, T.1
Krivokapic, Z.2
Uchida, K.3
Nishi, Y.4
Saraswat, K.C.5
-
19
-
-
0142077567
-
High-performance strained Si/SiGe pMOS devices with multiple quantum wells
-
Dec
-
N. Collaert, P. Verheyen, K. D. Meyer, R. Loo, and M. Caymax, "High-performance strained Si/SiGe pMOS devices with multiple quantum wells," IEEE Trans. Nanotechnol., vol. 1, no. 4, pp. 190-194, Dec. 2002.
-
(2002)
IEEE Trans. Nanotechnol
, vol.1
, Issue.4
, pp. 190-194
-
-
Collaert, N.1
Verheyen, P.2
Meyer, K.D.3
Loo, R.4
Caymax, M.5
-
20
-
-
46149119210
-
High performance Ge pMOS devices using a Si-compatible process flow
-
P. Zimmerman, G. Nicholas, B. D. Jaeger, D. Kaczer, A. Stesmans, L.-A. Ragnarsson, D. P. Brunco, F. E. Leys, M. Caymax, G. Winderickx, K. Opsomer, M. Meuris, and M. M. Heyns, "High performance Ge pMOS devices using a Si-compatible process flow," in IEDM Tech. Dig., 2006, pp. 1-4.
-
(2006)
IEDM Tech. Dig
, pp. 1-4
-
-
Zimmerman, P.1
Nicholas, G.2
Jaeger, B.D.3
Kaczer, D.4
Stesmans, A.5
Ragnarsson, L.-A.6
Brunco, D.P.7
Leys, F.E.8
Caymax, M.9
Winderickx, G.10
Opsomer, K.11
Meuris, M.12
Heyns, M.M.13
-
21
-
-
37549031445
-
Germanium: The past and possibility a future material for microelectronics
-
D. P. Brunco, B. D. Jaeger, G. Eneman, A. Satta, V. Terzieva, L. Souriau, F. E. Leys, G. Pourtois, M. Houssa, K. Opsomer, G. Nicholas, M. Meuris, and M. M. Heyns, "Germanium: The past and possibility a future material for microelectronics," ECS Trans., vol. 11, no. 4, pp. 479-493, 2007.
-
(2007)
ECS Trans
, vol.11
, Issue.4
, pp. 479-493
-
-
Brunco, D.P.1
Jaeger, B.D.2
Eneman, G.3
Satta, A.4
Terzieva, V.5
Souriau, L.6
Leys, F.E.7
Pourtois, G.8
Houssa, M.9
Opsomer, K.10
Nicholas, G.11
Meuris, M.12
Heyns, M.M.13
-
22
-
-
4544382134
-
2 gate dielectric and TiN metal gate for advanced CMOS
-
2 gate dielectric and TiN metal gate for advanced CMOS," in IEDM Tech. Dig., 2004, pp. 42-43.
-
(2004)
IEDM Tech. Dig
, pp. 42-43
-
-
Weber, O.1
Ducroquet, F.2
Emst, T.3
Andrieu, F.4
Damlencourt, J.-F.5
Hartmann, J.-M.6
Guillaumot, B.7
Papon, A.-M.8
Dansas, H.9
Brevard, L.10
Toffoli, A.11
Besson, P.12
Martin, F.13
Morand, Y.14
Deleonibus, S.15
|