Simultaneous power fluctuation and average power minimization during nano-CMOS behavioral synthesis

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2007, Pages 577-582

  Mohanty, Saraju P ^a   Kougianos, Elias ^b  

^a Center for Advanced Research and Technology   (United States)

^b UNIVERSITY OF NORTH TEXAS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AVERAGE POWERS; BEHAVIORAL SYNTHESES; COMPONENT LIBRARIES; DUAL GATE OXIDES; DUAL THRESHOLD VOLTAGES; DYNAMIC POWERS; MONTE CARLO SIMULATIONS; POWER FLUCTUATIONS; POWER SUPPLIES; SIGNIFICANT REDUCTIONS; SIMULTANEOUS SCHEDULING; STANDARD BENCHMARKS; STATISTICAL VARIATIONS; SUBTHRESHOLD LEAKAGES; TIME CONSTRAINTS; TOTAL POWER CONSUMPTIONS; TOTAL POWERS;

COMPUTER PROGRAMMING LANGUAGES; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUITS; LEAKAGE CURRENTS; MONTE CARLO METHODS; MOSFET DEVICES; OPTIMIZATION;

EMBEDDED SYSTEMS;

EID: 48349104077     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2007.142     Document Type: Conference Paper

References (15)

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