Blockage and voltage island-aware dual-VDD buffered tree construction under fixed buffer locations

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2008, Pages 23-30

  Tseng, Bruce ^a   Chen, Hung Ming ^b  

^a FARADAY TECHNOLOGY CORPORATION   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Buffer insertion; Low power; Voltage island architecture

Indexed keywords

BUFFER STORAGE; ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; MICROPROCESSOR CHIPS; VLSI CIRCUITS;

BUFFER INSERTION; ROUTING TREE CONSTRUCTION; VOLTAGE ISLAND ARCHITECTURE;

TREES (MATHEMATICS);

EID: 43349083061     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1353629.1353636     Document Type: Conference Paper

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