Buffer insertion with accurate gate and interconnect delay computation

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 479-484

  Alpert, Charles J ^a   Devgan, Anirudh ^a   Quay, Stephen T ^a  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; COMPUTATIONAL METHODS; ELECTRIC ADMITTANCE; ELECTRIC NETWORK ANALYSIS; ELECTROMAGNETIC WAVE PROPAGATION; TREES (MATHEMATICS);

BUFFER INSERTION; DEEP-SUBMICRON (DSM) DATAPATH DESIGN; ROUTING TREES;

BUFFER CIRCUITS;

EID: 0032650596     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/309847.309983     Document Type: Conference Paper

References (18)