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Volumn , Issue , 2000, Pages 374-378
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Maze Routing with Buffer Insertion and Wiresizing
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
BUFFER CIRCUITS;
DYNAMIC PROGRAMMING;
GRAPH THEORY;
MATHEMATICAL MODELS;
TABLE LOOKUP;
THEOREM PROVING;
VLSI CIRCUITS;
BUFFER INSERTION;
BUFFER PLANNING GRAPH;
ELMORE DELAY MODEL;
MAZE ROUTING;
WIRESIZING PROBLEM;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0033681635
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/337292.337500 Document Type: Conference Paper |
Times cited : (32)
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References (9)
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