Subthreshold performance of dual-material gate CMOS devices and circuits for ultralow power analog/mixed-signal applications

IEEE Transactions on Electron Devices

Volumn 55, Issue 3, 2008, Pages 827-832

  Chakraborty, Saurav ^a   Mallik, Abhijit ^b   Sarkar, Chandan Kumar ^c  

^a SEMAC Pvt Ltd   (India)

^b UNIVERSITY OF CALCUTTA   (India)

^c JADAVPUR UNIVERSITY   (India)

Author keywords

CMOS; Dual material gate (DMG); Mixed signal; Subthreshold; Ultralow power

Indexed keywords

ANALOG CIRCUITS; CAPACITANCE; DRAIN CURRENT; TRANSCONDUCTANCE;

DUAL-MATERIAL GATE; MIXED SIGNAL; VOLTAGE GAIN;

CMOS INTEGRATED CIRCUITS;

EID: 40949136578     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.914842     Document Type: Article

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