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Volumn 43, Issue 3, 2008, Pages 684-694

An LDPC decoder chip based on self-routing network for IEEE 802.16e applications

Author keywords

Decoder architectures; IEEE 802.16; Iterative decoders; LDPC codes; Phase overlapping; Self routing; WiMax

Indexed keywords

ITERATIVE DECODING; MATRIX ALGEBRA; THROUGHPUT;

EID: 40149094352     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.916610     Document Type: Article
Times cited : (114)

References (21)
  • 2
    • 33749160113 scopus 로고    scopus 로고
    • A 3.33 Gb/s (1200, 720) low-density parity check code decoder
    • C.-C. Lin, K.-L. Lin, C.-C. Chung, and C.-Y. Lee, "A 3.33 Gb/s (1200, 720) low-density parity check code decoder," in Proc. ESSCIRC, 2005, pp. 211-214.
    • (2005) Proc. ESSCIRC , pp. 211-214
    • Lin, C.-C.1    Lin, K.-L.2    Chung, C.-C.3    Lee, C.-Y.4
  • 4
    • 40149085446 scopus 로고    scopus 로고
    • VLSI designs of LDPC codec for IEEE 802.16e system,
    • Masters thesis, National Taiwan Univ, Taipei, Taiwan, R.O.C
    • X.-Y. Shi, "VLSI designs of LDPC codec for IEEE 802.16e system," Masters thesis, National Taiwan Univ., Taipei, Taiwan, R.O.C., 2006.
    • (2006)
    • Shi, X.-Y.1
  • 7
    • 33644658527 scopus 로고    scopus 로고
    • Design methodology for high-throughput memory-efficient programmable decoder cores for architecture-aware low-density parity-check codes
    • Seoul, Korea, Aug
    • M. M. Mansour and N. R. Shanbhag, "Design methodology for high-throughput memory-efficient programmable decoder cores for architecture-aware low-density parity-check codes," in Proc. IEEE Workshop on Signal Process. Syst (SiPS'03), Seoul, Korea, Aug. 2003, pp. 159-164.
    • (2003) Proc. IEEE Workshop on Signal Process. Syst (SiPS'03) , pp. 159-164
    • Mansour, M.M.1    Shanbhag, N.R.2
  • 8
    • 33644640388 scopus 로고    scopus 로고
    • A 640-Mb/s 2048-bit programmable LDPC decoder chip
    • Mar
    • M. M. Mansour and N. R. Shanbhag, "A 640-Mb/s 2048-bit programmable LDPC decoder chip," IEEE J. Solid-State Circuits, vol. 41, no. 3, pp. 634-698, Mar. 2006.
    • (2006) IEEE J. Solid-State Circuits , vol.41 , Issue.3 , pp. 634-698
    • Mansour, M.M.1    Shanbhag, N.R.2
  • 9
    • 40149087080 scopus 로고    scopus 로고
    • Part 16: Air Interface for Fixed and Mobile Broadband Wireless Access Systems Amendment for Physical and Medium Access Control Layers for Combined Fixed and Mobile Operation in Licensed Bands, IEEE P802.16e-2005, 2005.
    • Part 16: Air Interface for Fixed and Mobile Broadband Wireless Access Systems Amendment for Physical and Medium Access Control Layers for Combined Fixed and Mobile Operation in Licensed Bands, IEEE P802.16e-2005, 2005.
  • 10
    • 0036504121 scopus 로고    scopus 로고
    • A 690 mW 1 Gb/s 1024b rate 1/2 low density parity check code decoder
    • Mar
    • A. J. Blanksby and C. J. Howland, "A 690 mW 1 Gb/s 1024b rate 1/2 low density parity check code decoder," IEEE J. Solid-State. Circuits, vol. 37, no. 3, pp. 404-412, Mar. 2002.
    • (2002) IEEE J. Solid-State. Circuits , vol.37 , Issue.3 , pp. 404-412
    • Blanksby, A.J.1    Howland, C.J.2
  • 11
    • 84888027132 scopus 로고    scopus 로고
    • On finite precision implementation of low density parity check codes decoder
    • Sydney, Australia, May
    • T. Zhang, Z. Wang, and K. K. Parhi, "On finite precision implementation of low density parity check codes decoder," in Proc. IEEE ISCAS, Sydney, Australia, May 2001, vol. 4, pp. 202-205.
    • (2001) Proc. IEEE ISCAS , vol.4 , pp. 202-205
    • Zhang, T.1    Wang, Z.2    Parhi, K.K.3
  • 12
    • 0036292755 scopus 로고    scopus 로고
    • Parallel VLSI architectures for a class of LDPC codes
    • Phoenix-Scottsdale, AZ, May
    • S. Kim, G. E. Sobelman, and J. Moon, "Parallel VLSI architectures for a class of LDPC codes," in Proc. IEEE ISCAS, Phoenix-Scottsdale, AZ, May 2002, vol. 2, pp. 93-96.
    • (2002) Proc. IEEE ISCAS , vol.2 , pp. 93-96
    • Kim, S.1    Sobelman, G.E.2    Moon, J.3
  • 13
    • 0842310952 scopus 로고    scopus 로고
    • A FPGA and ASIC implementation of rate 1/2, 8088-b irregular low density parity check decoder
    • H. Chen, "A FPGA and ASIC implementation of rate 1/2, 8088-b irregular low density parity check decoder," in Proc. IEEE GLOBECOM, 2003, vol. 1, pp. 113-117.
    • (2003) Proc. IEEE GLOBECOM , vol.1 , pp. 113-117
    • Chen, H.1
  • 14
    • 33646533730 scopus 로고    scopus 로고
    • Loosely coupled memory-based decoding architecture for low density parity check codes
    • May
    • S.-H. Kang and I.-C Park, "Loosely coupled memory-based decoding architecture for low density parity check codes," IEEE Trans. Circuits Syst. I, vol. 53, no. 5, pp. 1045-1056, May 2006.
    • (2006) IEEE Trans. Circuits Syst. I , vol.53 , Issue.5 , pp. 1045-1056
    • Kang, S.-H.1    Park, I.-C.2
  • 15
    • 40149091735 scopus 로고    scopus 로고
    • C.-H. Liu, C.-C. Lin, H.-C. Chang, C.-Y. Lee, and Y.-S. Hsu, Method and apparatus for switching data in communication systems, Taiwan and US patent pending
    • C.-H. Liu, C.-C. Lin, H.-C. Chang, C.-Y. Lee, and Y.-S. Hsu, "Method and apparatus for switching data in communication systems," Taiwan and US patent pending.
  • 17
    • 0036493854 scopus 로고    scopus 로고
    • Near optimum universal belief propagation based decoding of lower-density parity check codes
    • Mar
    • J. Chen and M. Fossorier, "Near optimum universal belief propagation based decoding of lower-density parity check codes," IEEE Trans. Commun., vol. 50, pp. 406-414, Mar. 2002.
    • (2002) IEEE Trans. Commun , vol.50 , pp. 406-414
    • Chen, J.1    Fossorier, M.2
  • 18
    • 17044383428 scopus 로고    scopus 로고
    • A reduced complexity decoder architecture via layered decoding of LDPC codes
    • Austin, TX, Oct
    • D. E. Hocevar, "A reduced complexity decoder architecture via layered decoding of LDPC codes," in Proc. IEEE Workshop on Signal Processing Systems, Austin, TX, Oct. 2004, pp. 107-112.
    • (2004) Proc. IEEE Workshop on Signal Processing Systems , pp. 107-112
    • Hocevar, D.E.1
  • 21
    • 34250826411 scopus 로고    scopus 로고
    • Mobile WiMAX - Part I: A technical overview and performance evaluation
    • "Mobile WiMAX - Part I: A technical overview and performance evaluation," WiMAX Forum, Aug. 2006.
    • (2006) WiMAX Forum, Aug


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.