Tightening the bounds on feasible preemption points

Proceedings - Real-Time Systems Symposium

Volumn , Issue , 2006, Pages 212-222

  Ramaprasad, Harini ^a   Mueller, Frank ^a  

^a NORTH CAROLINA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA CACHES; HIGHER-END ARCHITECTURES; PREEMPTION DELAY; TIMING PREDICTABILITY;

FEEDBACK CONTROL; PROBLEM SOLVING; PROGRAM PROCESSORS; REAL TIME SYSTEMS; SIGNAL FILTERING AND PREDICTION; SIGNAL INTERFERENCE;

CACHE MEMORY;

EID: 38949092485     PISSN: 10528725     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTSS.2006.49     Document Type: Conference Paper

References (28)

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