-
1
-
-
0000703331
-
Applying new scheduling theory to static priority pre-emptive scheduling
-
A. N. Audsley, A. Burns, M. Richardson, and K. Tindell. Applying new scheduling theory to static priority pre-emptive scheduling. Software Engineering Journal, pages 284-292, 1993.
-
(1993)
Software Engineering Journal
, pp. 284-292
-
-
Audsley, A.N.1
Burns, A.2
Richardson, M.3
Tindell, K.4
-
3
-
-
0003510233
-
Evaluating future microprocessors: The simplescalar toolset
-
University of Wisconsin - Madison, CS Dept., July
-
D. Burger, T. Austin, and S. Bennett. Evaluating future microprocessors: The simplescalar toolset. Technical Report CS-TR-96-1308, University of Wisconsin - Madison, CS Dept., July 1996.
-
(1996)
Technical Report
, vol.CS-TR-96-1308
-
-
Burger, D.1
Austin, T.2
Bennett, S.3
-
4
-
-
84884614089
-
Adding instruction cache effect to an exact schedulability analysis of preemptive real-time systems
-
June
-
.T. V. Busquets-Matraix. Adding instruction cache effect to an exact schedulability analysis of preemptive real-time systems. In EuroMicro Workshop on Real-Time Systems, June 1996.
-
(1996)
EuroMicro Workshop on Real-time Systems
-
-
Busquets-Matraix, T.V.1
-
5
-
-
0034832018
-
Exact analysis of the cache behavior of nested loops
-
June
-
S. Chatterjee, E. Parker, P. Hanlon, and A. Lebeck. Exact analysis of the cache behavior of nested loops. In ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 286-297, June 2001.
-
(2001)
ACM SIGPLAN Conference on Programming Language Design and Implementation
, pp. 286-297
-
-
Chatterjee, S.1
Parker, E.2
Hanlon, P.3
Lebeck, A.4
-
6
-
-
0036991624
-
Low-complexity algorithms for static cache locking in multitasking hard real-time systems
-
dec
-
D. Decotigny and I. Puaut. Low-complexity algorithms for static cache locking in multitasking hard real-time systems. In IEEE Real-Time Systems Symposium, page 114, dec 2002.
-
(2002)
IEEE Real-time Systems Symposium
, pp. 114
-
-
Decotigny, D.1
Puaut, I.2
-
8
-
-
0001714824
-
Cache miss equations: A compiler framework for analyzing and tuning memory behavior
-
S. Ghosh, M. Martonosi, and S. Malik. Cache miss equations: a compiler framework for analyzing and tuning memory behavior. ACM Transactions on Programming Languages and Systems, 21(4):703-746, 1999.
-
(1999)
ACM Transactions on Programming Languages and Systems
, vol.21
, Issue.4
, pp. 703-746
-
-
Ghosh, S.1
Martonosi, M.2
Malik, S.3
-
10
-
-
0000940792
-
Analysis or cache-related preemption delay in fixed-priority preemptive scheduling
-
C.-G. Lee, J. Hahn, Y.-M. Seo, S. L. Min, R. Ha, S. Hong, C. Y. Park, M. Lee, and C. S. Kim. Analysis or cache-related preemption delay in fixed-priority preemptive scheduling. IEEE Transactions on Computers, 47(6):700-713, 1998.
-
(1998)
IEEE Transactions on Computers
, vol.47
, Issue.6
, pp. 700-713
-
-
Lee, C.-G.1
Hahn, J.2
Seo, Y.-M.3
Min, S.L.4
Ha, R.5
Hong, S.6
Park, C.Y.7
Lee, M.8
Kim, C.S.9
-
11
-
-
0035441708
-
Bounding cache-related preemption delay for real-time systems
-
Nov.
-
C.-G. Lee, K. Lee, J. Hahn, Y.-M. Seo, S. L. Min, R. Ha, S. Hong, C. Y. Park, M. Lee, and C. S. Kim. Bounding cache-related preemption delay for real-time systems. IEEE Transactions on Software Engineering, 27(9): 805-826, Nov. 2001.
-
(2001)
IEEE Transactions on Software Engineering
, vol.27
, Issue.9
, pp. 805-826
-
-
Lee, C.-G.1
Lee, K.2
Hahn, J.3
Seo, Y.-M.4
Min, S.L.5
Ha, R.6
Hong, S.7
Park, C.Y.8
Lee, M.9
Kim, C.S.10
-
12
-
-
0024915921
-
The rate monotonic scheduling algorithm: Exact characterization and average case behavior
-
Santa Monica, California, Dec.
-
J. Lehoczky, L. Sha, and Y. Ding. The rate monotonic scheduling algorithm: Exact characterization and average case behavior. In Proceedings of the Real-Time Systems Symposium, Santa Monica, California, Dec. 1989.
-
(1989)
Proceedings of the Real-time Systems Symposium
-
-
Lehoczky, J.1
Sha, L.2
Ding, Y.3
-
13
-
-
0030414718
-
Cache modeling for real-time software: Beyond direct mapped instruction caches
-
Dec.
-
Y.-T. S. Li, S. Malik, and A. Wolfe. Cache modeling for real-time software: Beyond direct mapped instruction caches. In IEEE Real-Time Systems Symposium, pages 254-263, Dec. 1996.
-
(1996)
IEEE Real-time Systems Symposium
, pp. 254-263
-
-
Li, Y.-T.S.1
Malik, S.2
Wolfe, A.3
-
14
-
-
0003039244
-
An accurate worst case timing analysis for RISC processors
-
Dec.
-
S.-S. Lim, Y. H. Bae, G. T.Tang, B.-D. Rhee, S. L. Min, C. Y. Park, H. Shin, and C. S. Kim. An accurate worst case timing analysis for RISC processors. In IEEE Real-Time Systems Symposium, pages 97-108, Dec. 1994.
-
(1994)
IEEE Real-time Systems Symposium
, pp. 97-108
-
-
Lim, S.-S.1
Bae, Y.H.2
Tang, G.T.3
Rhee, B.-D.4
Min, S.L.5
Park, C.Y.6
Shin, H.7
Kim, C.S.8
-
16
-
-
0342932896
-
Empirical bounds on data caching in high-performance real-time systems
-
Chalmers University of Technology
-
T. Lundqvist and P. Stenstrm. Empirical bounds on data caching in high-performance real-time systems. Technical report, Chalmers University of Technology, 1999.
-
(1999)
Technical Report
-
-
Lundqvist, T.1
Stenstrm, P.2
-
18
-
-
0036991624
-
Low-complexity algorithms for static cache locking in multitasking hard real-time systems
-
I. Puaut and D. Decotigny. Low-complexity algorithms for static cache locking in multitasking hard real-time systems. In IEEE Real-Time Systems Symposium, 2002.
-
(2002)
IEEE Real-time Systems Symposium
-
-
Puaut, I.1
Decotigny, D.2
-
23
-
-
14844355824
-
A fast and accurate approach to analyze cache memory behavior (research note)
-
X. Vera, J. Llosa, A. Gonzalez, and N. Bermudo. A fast and accurate approach to analyze cache memory behavior (research note). Lecture Notes in Computer Science, 1900:194-198, 2000.
-
(2000)
Lecture Notes in Computer Science
, vol.1900
, pp. 194-198
-
-
Vera, X.1
Llosa, J.2
Gonzalez, A.3
Bermudo, N.4
-
25
-
-
0035501757
-
A comparison of static analysis and evolutionary testing for the verification of timing constraints
-
Nov.
-
J. Wegener and F. Mueller. A comparison of static analysis and evolutionary testing for the verification of timing constraints. Real-Time Systems, 21(3):241-268, Nov. 2001.
-
(2001)
Real-time Systems
, vol.21
, Issue.3
, pp. 241-268
-
-
Wegener, J.1
Mueller, F.2
-
26
-
-
0033327137
-
Timing analysis for data and wrap-around fill caches
-
Nov.
-
R. T. White, F. Mueller, C. Healy, D. Whalley, and M. G. Harmon. Timing analysis for data and wrap-around fill caches. Real-Time Systems, 17(2/3):209-233, Nov. 1999.
-
(1999)
Real-time Systems
, vol.17
, Issue.2-3
, pp. 209-233
-
-
White, R.T.1
Mueller, F.2
Healy, C.3
Whalley, D.4
Harmon, M.G.5
|