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Volumn 2006, Issue , 2006, Pages 71-80

Bounding preemption delay within data cache reference patterns for real-time tasks

Author keywords

[No Author keywords available]

Indexed keywords

CACHE BEHAVIOR; PREEMPTION DELAY; PREEMPTION POINTS; PREEMPTIVE SYSTEMS; WCET PREDICTIONS;

EID: 33749646825     PISSN: 15453421     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTAS.2006.14     Document Type: Conference Paper
Times cited : (39)

References (27)
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    • Low-complexity algorithms for static cache locking in multitasking hard real-time systems
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    • D. Decotigny and I. Puaut. Low-complexity algorithms for static cache locking in multitasking hard real-time systems. In IEEE Real-Time Systems Symposium, page 114, dec 2002.
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    • Decotigny, D.1    Puaut, I.2
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    • Lehoczky, J.1    Sha, L.2    Ding, Y.3
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    • Y.-T. S. Li, S. Malik, and A. Wolfe. Cache modeling for real-time software: Beyond direct mapped instruction caches. In IEEE Real-Time Systems Symposium, pages 254-263, Dec. 1996.
    • (1996) IEEE Real-time Systems Symposium , pp. 254-263
    • Li, Y.-T.S.1    Malik, S.2    Wolfe, A.3
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    • Empirical bounds on data caching in high-performance real-time systems
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    • Lundqvist, T.1    Stenstrm, P.2
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    • 0036991624 scopus 로고    scopus 로고
    • Low-complexity algorithms for static cache locking in multitasking hard real-time systems
    • I. Puaut and D. Decotigny. Low-complexity algorithms for static cache locking in multitasking hard real-time systems. In IEEE Real-Time Systems Symposium, 2002.
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    • A fast and accurate approach to analyze cache memory behavior (research note)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.