Program path analysis to bound cache-related preemption delay in preemptive real-time systems

Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 2000, Pages 67-71

  Tomiyama, Hiroyuki ^a   Dutt, Nikil D ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; ESTIMATION; LINEAR PROGRAMMING; MULTIPROGRAMMING; REAL TIME SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

CACHE RELATED PREEMPTION DELAY; INTEGER LINEAR PROGRAMMING TECHNIQUE; INTERTASK CACHE INTERFERENCE; PREEMPTIVE REAL TIME SYSTEMS; PROGRAM PATH ANALYSIS;

CRITICAL PATH ANALYSIS;

EID: 0033742255     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/334012.334025     Document Type: Article

References (16)