A digital calibration technique for charge pumps in phase-locked systems

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 2, 2008, Pages 390-398

  Liang, Che Fu ^a,b   Chen, Shin Hua ^a,b   Liu, Shen Iuan ^a,b  

^a IEEE

^b NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Charge pump (CP) calibration; Digital calibration; Frequency synthesizer; Phase locked loop (PLL)

Indexed keywords

ELECTRIC POTENTIAL; FREQUENCY SYNTHESIZERS; NATURAL FREQUENCIES; SWITCHING;

CHANNEL LENGTH MODULATION; CHARGE PUMP (CP) CALIBRATION; CONTROL VOLTAGES; DIGITAL CALIBRATION;

PHASE LOCKED LOOPS;

EID: 38849207480     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.914283     Document Type: Article

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