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Volumn 53, Issue 9, 2006, Pages 822-826

A Calibrated Phase/Frequency Detector for Reference Spur Reduction in Charge-Pump PLLs

Author keywords

phase locked loop (PLL); Phase frequency detector (PFD); voltage control oscillator (VCO)

Indexed keywords

ELECTRIC FREQUENCY MEASUREMENT; OPTIMIZATION; PHASE MEASUREMENT; VARIABLE FREQUENCY OSCILLATORS; VOLTAGE CONTROL;

EID: 34047187921     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.880030     Document Type: Article
Times cited : (49)

References (7)
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    • Gardner, F.1
  • 4
    • 0030290680 scopus 로고    scopus 로고
    • Low-jitter process-independant DLL and PLL based on self-biased techniques
    • Nov
    • J. Maneatis “Low-jitter process-independant DLL and PLL based on self-biased techniques,” IEEE J. Solid-State Circuits, vol. 31, no. 11, pp. 1723–1732, Nov. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , Issue.11 , pp. 1723-1732
    • Maneatis, J.1
  • 5
    • 0141856002 scopus 로고    scopus 로고
    • Design of high-performance CMOS charge pumps in phase-locked loops
    • May
    • W. Rhee, “Design of high-performance CMOS charge pumps in phase-locked loops,” in Proc. IEEE Int. Symp. Circuits Syst., May 1999, vol. 2, pp. 363–366.
    • (1999) in Proc. IEEE Int. Symp. Circuits Syst , vol.2 , pp. 363-366
    • Rhee, W.1
  • 6
    • 0004200915 scopus 로고    scopus 로고
    • Englewood Cliffs, NJ Pren-tice-Hall
    • B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Pren-tice-Hall 1998.
    • (1998) RF Microelectronics
    • Razavi, B.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.