-
1
-
-
2542626631
-
The future for CERN
-
L. Maiani, "The future for CERN," Eur. Phys. J. C34, pp. 85-90, 2004.
-
(2004)
Eur. Phys. J
, vol.C34
, pp. 85-90
-
-
Maiani, L.1
-
3
-
-
0033362819
-
A multibit Σ Δ modulator in floating-body SOS/SOI CMOS for extreme radiation environment
-
Jul
-
C. F. Edwards et al., "A multibit Σ Δ modulator in floating-body SOS/SOI CMOS for extreme radiation environment," IEEE1 J. Solid-State Circuits, vol. 34, no. 7, pp. 937-948, Jul. 1999.
-
(1999)
IEEE1 J. Solid-State Circuits
, vol.34
, Issue.7
, pp. 937-948
-
-
Edwards, C.F.1
-
4
-
-
0033311541
-
Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: Practical design aspects
-
Dec
-
G. Anelli et al., "Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: Practical design aspects," IEEE Trans. Nucl. Sci., vol. 46, no. 6, Dec. 1999.
-
(1999)
IEEE Trans. Nucl. Sci
, vol.46
, Issue.6
-
-
Anelli, G.1
-
5
-
-
0003251684
-
Design issues for radiation tolerant microcircuits in space
-
D. R. Alexander et al., "Design issues for radiation tolerant microcircuits in space," in Proc. 1996 IEEE NSREC Short Course, 1996, pp. V-1-V-54.
-
(1996)
Proc. 1996 IEEE NSREC Short Course
-
-
Alexander, D.R.1
-
6
-
-
0035158883
-
Evaluating manufacturability of radiation-hardened SOI substrates
-
M. Alles et al., "Evaluating manufacturability of radiation-hardened SOI substrates," in Proc. IEEE Int. SOI Conf. 2001, pp. 131-132.
-
(2001)
Proc. IEEE Int. SOI Conf
, pp. 131-132
-
-
Alles, M.1
-
7
-
-
0034450465
-
Application of hardness-by-design methodology to radiation-tolerant ASIC technologies
-
Dec
-
R. C. Lacoe et al., "Application of hardness-by-design methodology to radiation-tolerant ASIC technologies," IEEE Trans. Nucl. Sci., vol. 47, no. 6, pp. 2334-2341, Dec. 2000.
-
(2000)
IEEE Trans. Nucl. Sci
, vol.47
, Issue.6
, pp. 2334-2341
-
-
Lacoe, R.C.1
-
8
-
-
0033307440
-
Single event effects in static and dynamic registers in a 0.25 μm CMOS technology
-
Dec
-
F. Faceio, K. Kloukinas, and A. Marchioro, "Single event effects in static and dynamic registers in a 0.25 μm CMOS technology," IEEE Trans. Nucl., Sci., vol. 46, no. 6, pp. 1434-1439, Dec. 1999.
-
(1999)
IEEE Trans. Nucl., Sci
, vol.46
, Issue.6
, pp. 1434-1439
-
-
Faceio, F.1
Kloukinas, K.2
Marchioro, A.3
-
11
-
-
0021599338
-
Radiation effects in MOS Capacitors with very thin oxides at 80 °K
-
Dec
-
N. S. Saks et al., "Radiation effects in MOS Capacitors with very thin oxides at 80 °K," IEEE Trans. Nucl. Sci., vol. NS-31, no. 6, pp. 1249-1255, Dec. 1984.
-
(1984)
IEEE Trans. Nucl. Sci
, vol.NS-31
, Issue.6
, pp. 1249-1255
-
-
Saks, N.S.1
-
12
-
-
0000181148
-
An overview of radiation-induced interface traps in MOS structures
-
T. R. Oldham et al., "An overview of radiation-induced interface traps in MOS structures,"Semicond. Sci. Technol., vol. 4, pp. 986-999, 1989.
-
(1989)
Semicond. Sci. Technol
, vol.4
, pp. 986-999
-
-
Oldham, T.R.1
-
13
-
-
0022918802
-
Generation of interface states by ionizing radiation in very thin MOS oxides
-
Dec
-
N. S. Saks et al., "Generation of interface states by ionizing radiation in very thin MOS oxides," IEEE Trans. Nucl Sci., vol. NS-33, no. 6. pp. 1185-1190, Dec. 1986.
-
(1986)
IEEE Trans. Nucl Sci
, vol.NS-33
, Issue.6
, pp. 1185-1190
-
-
Saks, N.S.1
-
14
-
-
37249061215
-
-
International Technology Roadmap for Semiconductors
-
International Technology Roadmap for Semiconductors 2005.
-
(2005)
-
-
-
15
-
-
84858494363
-
-
Available
-
[Online]. Available: http://www.itts.net/Links/2005ITRS/ExecSum2005.pdf
-
-
-
-
16
-
-
37249003303
-
-
G. Anelli, Design and characterization of radiation tolerant integrated circuits in deep submicron CMOS technologies for the LHC experiments Ph.D. dissertation, Grenoble Inst. Technol., Grenoble, France. 2000 [Online]. Available: http://www.rd49.web.cern.ch/RD49/RD49Docs/anelli/ these.html
-
G. Anelli, "Design and characterization of radiation tolerant integrated circuits in deep submicron CMOS technologies for the LHC experiments" Ph.D. dissertation, Grenoble Inst. Technol., Grenoble, France. 2000 [Online]. Available: http://www.rd49.web.cern.ch/RD49/RD49Docs/anelli/ these.html
-
-
-
-
17
-
-
0032318033
-
Challenges in hardening technologies using shallow-trench isolation
-
Dec
-
M. R. Shaneyfelt et al., "Challenges in hardening technologies using shallow-trench isolation," IEEE Trans. Nucl. Sci., vol. 45, no. 6, pp. 2584-2592, Dec. 1998.
-
(1998)
IEEE Trans. Nucl. Sci
, vol.45
, Issue.6
, pp. 2584-2592
-
-
Shaneyfelt, M.R.1
-
18
-
-
0030349737
-
Two-dimensional simulation of total dose effects on NMOSFET with lateral parasitic transistor
-
Dec
-
C. Brisset et al., "Two-dimensional simulation of total dose effects on NMOSFET with lateral parasitic transistor," IEEE Trans. Nucl. Sci., vol. 43, no. 6, pp. 2651-2658, Dec. 1996.
-
(1996)
IEEE Trans. Nucl. Sci
, vol.43
, Issue.6
, pp. 2651-2658
-
-
Brisset, C.1
-
19
-
-
0015015144
-
New developments in IC voltage regulators
-
Jan
-
R. J. Widlar, "New developments in IC voltage regulators," IEEE J.Solid-State Circuits, vol. SSC-6, no. 1, pp. 2-7, Jan. 1971.
-
(1971)
IEEE J.Solid-State Circuits
, vol.SSC-6
, Issue.1
, pp. 2-7
-
-
Widlar, R.J.1
-
20
-
-
0015639733
-
A precision reference voltage source
-
Jun
-
K. E. Kuijk, "A precision reference voltage source," IEEE J. Solid-State Circuits, vol. SSC-8, no. 3, pp. 222-226, Jun. 1973.
-
(1973)
IEEE J. Solid-State Circuits
, vol.SSC-8
, Issue.3
, pp. 222-226
-
-
Kuijk, K.E.1
-
21
-
-
0036772189
-
Op-amps and startup circuits for CMOS bandgap references with near 1-V supply
-
Oct
-
A. Boni, "Op-amps and startup circuits for CMOS bandgap references with near 1-V supply," IEEE J. Solid-State. Circuits, vol. 37, no. 10, pp. 1339-1343, Oct. 2002.
-
(2002)
IEEE J. Solid-State. Circuits
, vol.37
, Issue.10
, pp. 1339-1343
-
-
Boni, A.1
-
22
-
-
0742303638
-
A CMOS subbandgap reference circuit with 1-V power supply voltage
-
Jan
-
J. Doyle et al., "A CMOS subbandgap reference circuit with 1-V power supply voltage," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 252-255, Jan. 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.1
, pp. 252-255
-
-
Doyle, J.1
-
23
-
-
0033717707
-
Design of low-voltage bandgap reference using transimpedance amplifier
-
Jun
-
J. Yueming and L. Edward, "Design of low-voltage bandgap reference using transimpedance amplifier," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 47, no. 6, pp. 552-555, Jun. 2000.
-
(2000)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.47
, Issue.6
, pp. 552-555
-
-
Yueming, J.1
Edward, L.2
-
24
-
-
0032675035
-
A CMOS bandgap reference circuit with sub-1-V operation
-
May
-
H. Banba et al., "A CMOS bandgap reference circuit with sub-1-V operation," IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 670-674, May 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, Issue.5
, pp. 670-674
-
-
Banba, H.1
-
25
-
-
37249009656
-
-
P. Moreira, private communication, Radiation effects on the CERN_bandgap circuit, private communication 2004.
-
P. Moreira, private communication, "Radiation effects on the "CERN_bandgap" circuit," private communication 2004.
-
-
-
-
26
-
-
37249015486
-
-
130 nm Bandgap Design Review. 2005, CERN, private communication
-
P. Moreira, 130 nm Bandgap Design Review. 2005, CERN, private communication.
-
-
-
Moreira, P.1
-
27
-
-
0023593395
-
Post-irradiation effects in field-oxide isolation structures
-
Dec
-
T. R. Oldham et al., "Post-irradiation effects in field-oxide isolation structures," IEEE Trans. Nucl. Sci., vol. 34, no. 6, pp. 1184-1189, Dec. 1987.
-
(1987)
IEEE Trans. Nucl. Sci
, vol.34
, Issue.6
, pp. 1184-1189
-
-
Oldham, T.R.1
-
28
-
-
85008028685
-
Gated-diode study of the corner and peripheral leakage cunent in high-energy neutron irradiated silicon P-N junctions
-
Apr
-
A. Czerwinski et al., "Gated-diode study of the corner and peripheral leakage cunent in high-energy neutron irradiated silicon P-N junctions," IEEE Trans. Nucl. Sci., vol. 50, no. 3, pp. 278-287, Apr. 2003.
-
(2003)
IEEE Trans. Nucl. Sci
, vol.50
, Issue.3
, pp. 278-287
-
-
Czerwinski, A.1
-
29
-
-
0033365864
-
Low-power bandgap references featuring DTMOST'S
-
Jul
-
A. J. Annema, "Low-power bandgap references featuring DTMOST'S," IEEE J. Solid-State Circuits, vol. 34, no. 7, pp. 949-955, Jul. 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, Issue.7
, pp. 949-955
-
-
Annema, A.J.1
-
31
-
-
0025577190
-
The design of band-gap reference circuits: Trials and tribulations
-
R. Pease, "The design of band-gap reference circuits: Trials and tribulations," in Proc. IEEE 1990 Bipolar Circuits Technology Meeting, 1990, pp. 214-218.
-
(1990)
Proc. IEEE 1990 Bipolar Circuits Technology Meeting
, pp. 214-218
-
-
Pease, R.1
-
32
-
-
0028745562
-
A dynamic threshold voltage MOSFET (DTMOST) for ultra-low voltage operation
-
F. Assaderaghi, D. Sinitsky, S. Parke, J. Bokor, P. K. Ko, and C. Hu, "A dynamic threshold voltage MOSFET (DTMOST) for ultra-low voltage operation," in Proc. IEDM'94, 1994, pp. 809-812.
-
(1994)
Proc. IEDM'94
, pp. 809-812
-
-
Assaderaghi, F.1
Sinitsky, D.2
Parke, S.3
Bokor, J.4
Ko, P.K.5
Hu, C.6
-
34
-
-
84907887596
-
A simple model for analogue application of dynamic threshold MOSTs
-
T. Smedes, J. Knol, and A. J. Annema, "A simple model for analogue application of dynamic threshold MOSTs," in Proc. 29th Eur. Solid-State. Device Re's. Conf., vol. 1, pp. 484-487.
-
Proc. 29th Eur. Solid-State. Device Re's. Conf
, vol.1
, pp. 484-487
-
-
Smedes, T.1
Knol, J.2
Annema, A.J.3
-
35
-
-
84858494357
-
-
Available
-
[Online], Available: http://proj-xraymic.web.cern.ch/proj-XrayMIC/
-
-
-
|