메뉴 건너뛰기




Volumn , Issue , 2004, Pages 229-232

Design of a comparator in CMOS SOI

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; IMPACT IONIZATION; LOGIC DESIGN; MOSFET DEVICES; NATURAL FREQUENCIES; PHASE COMPARATORS; SEQUENTIAL SWITCHING;

EID: 10444259823     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (10)
  • 2
    • 0026904737 scopus 로고
    • A small-signal model for the frequency-dependent drain admittance in floating-substrate MOSFET's
    • R. Howes and W. Redman-White, "A small-signal model for the frequency-dependent drain admittance in floating-substrate MOSFET's," IEEE J. Solid-State Circuits, pp. 1186-1193, 1992.
    • (1992) IEEE J. Solid-state Circuits , pp. 1186-1193
    • Howes, R.1    Redman-White, W.2
  • 3
    • 0032760793 scopus 로고    scopus 로고
    • Temperature-dependent kink effect model for partially-depleted SOI NMOS devices
    • S.-C. Lin and J.B. Kuo, "Temperature-dependent kink effect model for partially-depleted SOI NMOS devices," IEEE Trans. Electron Devices, pp. 254-258, 1999.
    • (1999) IEEE Trans. Electron Devices , pp. 254-258
    • Lin, S.-C.1    Kuo, J.B.2
  • 5
    • 0029406028 scopus 로고
    • Transient behavior of the kink effect in partially-depleted SOI MOSFET's
    • A. Wei, M. J. Sherony and D. A. Antoniadis, "Transient behavior of the kink effect in partially-depleted SOI MOSFET's," IEEE Electron Device Lett., pp. 494-496, 1995.
    • (1995) IEEE Electron Device Lett. , pp. 494-496
    • Wei, A.1    Sherony, M.J.2    Antoniadis, D.A.3
  • 7
    • 0032074892 scopus 로고    scopus 로고
    • Fully-depleted SOI CMOS for analog applications
    • May
    • J.-P. Colinge, "Fully-depleted SOI CMOS for analog applications," IEEE Trans. Electron Devices, vol. 45, no, 5, pp. 1010-1016, May 1998.
    • (1998) IEEE Trans. Electron Devices , vol.45 , Issue.5 , pp. 1010-1016
    • Colinge, J.-P.1
  • 9
    • 0035683088 scopus 로고    scopus 로고
    • A CMOS 6-bit, 1 GHz ADC for if sampling applications
    • K. Uyttenhove and M. Steyaert, "A CMOS 6-bit, 1 GHz ADC for IF sampling applications," IEEE MTT-S Digest,pp. 2131-2134, vol. 3, 2001.
    • (2001) IEEE MTT-S Digest , vol.3 , pp. 2131-2134
    • Uyttenhove, K.1    Steyaert, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.