Multibit ΣΔ modulator in floating-body SOS/SOI CMOS for extreme radiation environments

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 7, 1999, Pages 937-948

  Edwards, Christopher F ^a,b,g   Redman White, William ^a,h   Bracey, Mark ^a,c,j   Tenbroek, Bernard M ^a,d,i   Lee, Michael S L ^a,e   Uren, Michael J ^f  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

^b MAXIM INTEGRATED PRODUCTS   (United States)

^c NXP SEMICONDUCTORS   (Netherlands)

^d AKM Design Tek   (United States)

^e NATIONAL SEMICONDUCTOR CORPORATION   (United States)

^f DEFENCE SCIENCE AND TECHNOLOGY LABORATORY   (United Kingdom)

^g Plessey Semiconductors   (United Kingdom)

^h GEC Hirst Research Center   (United Kingdom)

ⁱ Telkom SA Limited   (South Africa)

^j English Electric Company   (United Kingdom)

more..

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; HYBRID INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; RADIATION EFFECTS; RADIATION HARDENING; SILICON ON INSULATOR TECHNOLOGY; SILICON ON SAPPHIRE TECHNOLOGY; SPURIOUS SIGNAL NOISE; THRESHOLD VOLTAGE; VLSI CIRCUITS;

FLOATING BODY EFFECTS; MIXED ANALOG DIGITAL INTEGRATED CIRCUITS;

DELTA SIGMA MODULATION;

EID: 0033362819     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.772408     Document Type: Article

References (20)

1. A. G. F. Dingwall, "Monolithic expandable 6 Bit 20 MHz CMOS/SOS A/D converter," IEEE J. Solid-State Circuits, vol. SC-14, pp. 926-932, Dec. 1979.
2. N. M. Mallinson, M. Lysejko, and A. S. Repton, "An 8 bit high performance ADC in silicon on sapphire," in Proc. ESA Electronic Components Conf. (ESTEC), The Hague, The Netherlands, Nov. 12-16, 1990, Mar. 1991, pp. 77-81.
3. T. Saraya, M. Takamiya, T. N. Duyet, T. Tanaka, H. Ishikuro, T. Hiramoto, and T. Ikoma, "Floating body effects in 0.15 μm partially depleted SOI MOSFET's below 1 V," in Proc. 1996 IEEE Int. SOI Conf., Oct. 1996, pp. 70-71.
4. J. Tihanyi and H. Schlötterer, "Properties of ESFI MOS transistors due to the floating substrate and the finite volume," IEEE Trans. Electron Devices, vol. ED-22, pp. 1017-1023, Nov. 1975.
5. S. S. Eaton and B. Lalevic, "The effect of a floating substrate on the operation of silicon-on-sapphire transistors," IEEE Trans. Electron Devices, vol. ED-25, pp. 907-912, Aug. 1978.
6. R. Howes and W. Redman-White, "A small-signal model for the frequency-dependent drain admittance in floating substrate MOSFET's," IEEE J. Solid-State Circuits, vol. 27, pp. 1186-1193, Aug. 1992.
7. A. Nishiyama, O. Arisumi, and M. Yoshimi, "Mechanism of the suppression of the floating-body effect for SOI MOSFET's with SiGe source structure." in Proc. 1996 IEEE Int. SOI Conf., Oct. 1996, pp. 68-69.
8. J.-P. Colinge, Silicon-On-Insulator Technology: Materials to VLSI, Kluwer Academic Publishers, 1991.
9. K. Suma, T. Tsuruda, H. Hidaka, T. Eimori, T. Oashi, Y. Yamaguchi, T. Iwamatsu, M. Hirose, F. Morishita, K. Arimoto, K. Fujishima, Y. Inoue, T. Nishimura, and T. Yoshihara, "An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology," IEEE J. Solid-State Circuits, vol. 29, pp. 1323-1328, Nov. 1994.
10. C. F. Edwards, W. Redman-White, B. M. Tenbroek, M. S. L. Lee, and M. J. Uren, "The effect of body contact series resistance on SOI CMOS amplifier stages," IEEE Trans. Electron Devices, vol. 44, pp. 2290-2294. Dec. 1997.
11. W. Redman-White, R. Lucas, R. Dunn, and P. Smithers, "A radiation-hard AGC stabilized SOS crystal oscillator," IEEE J. Solid-State Circuits, vol. 25, pp. 282-288, Feb. 1990.
12. W. Redman-White, B. M. Tenbroek, M. S. L. Lee, C. F. Edwards, M. J. Uren, and R. J. T. Bunyan, "Analogue design issues for SOI CMOS," in Proc. 1996 IEEE Int. SOI Conf., Oct. 1996, pp. 6-8.
13. R. Howes, W. Redman-White, K. G. Nichols, P. J. Mole, M. J. Robinson, and S. Bird, "An SOS MOSFET model based on calculation of the surface potential," IEEE Trans. Computer-Aided Design, vol. 13, pp. 494-506, Apr. 1994.
14. T. P. Ma and P. V. Dressendorfer, Eds., Ionizing Radiation Effects in MOS Devices and Circuits. New York: Wiley, 1989.
15. C. I. Lee, B. G. Rax, and A. H. Johnston, "Hardness assurance and testing techniques for high resolution (12- to 16-bit) analog-to-digital converters," IEEE Trans. Nucl. Sci., vol. 42, pp. 1681-1688, 1995.
16. D. Kimpton and J. Kerr. "A simple trap-detrap model for accurate prediction of radiation-induced threshold voltage shifts in radiation tolerant oxides for all static or time variant oxide fields," Solid-State Electron., vol. 37. no. 1, pp. 153-158, 1994.
17. E. Harari and D. J. McGreivy, "Radiation-induced leakage currents in n-channel silicon-on-sapphire MOSTS," IEEE Trans. Electron Devices, vol. ED-24, Nov. 1977.
18. C. F. Edwards, W. Redman-White, and M. Bracey, "A high speed offset-compensated differential comparator in floating body CMOS SOS technology for radiation hard switched capacitor systems," in Proc. IEEE Int. SOI Conf., Fish Camp, CA, Oct. 1997, pp. 160-161.
19. M. Bracey and W. Redman-White, "Design considerations for current domain regenerative comparators," in Proc. 1994 Inst. Elect. Eng. Conf. A/D and D/A Converters, Cambridge, U.K., July 1994, pp. 65-70.
20. M. J. M. Pelgrom, "A 10-b 50 MHz CMOS D/A converter with 75 ohm buffer," IEEE J. Solid-State Circuits, vol. 25, pp. 1347-1352, Dec. 1990.