An on-chip NBTI sensor for measuring PMOS threshold voltage degradation

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2007, Pages 189-194

  Keane, John ^a   Kim, Tae Hyoung ^a   Kim, Chris H ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

Aging; Delay; Locked loop; NBTI

Indexed keywords

DELAY-LOCKED LOOPS (DLL); MICROSECOND; NBTI SENSOR; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI);

AC MACHINERY; DC GENERATORS; ELECTRIC POTENTIAL; MEASUREMENT THEORY; SENSORS;

CMOS INTEGRATED CIRCUITS;

EID: 36949022867     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1283780.1283821     Document Type: Conference Paper

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