A new method for precise evaluation of dynamic recovery of negative bias temperature instability

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2005, Pages 197-199

  Aota, S ^a   Fujii, S ^b   Jin, Z W ^a   Ito, Y ^a   Utsumi, K ^a   Morifuji, E ^a   Yamada, S ^a   Matsuoka, F ^a   Noguchi, T ^a  

^a TOSHIBA CORPORATION   (Japan)

^b YOKOGAWA ANALYTICAL SYSTEMS INC   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHARACTERIZATION; DEGRADATION; MOSFET DEVICES; STRESS ANALYSIS;

DRAIN CURRENT; DYNAMIC RECOVERY;

MICROELECTRONICS;

EID: 27644455005     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. Sanjay Rangan, et al., "Universal Recovery Behavior of Negative Bias Temperature Instability" IDEM, pp.341-344 (2003)
2. M. Ershov, et al., "Dynamic recovery of negative bias temperature instability in p-type metal-oxide-semiconductor field-effect transistors" Appl. Phys Lett., Vol.83, No.8, pp.1647-1649 (2003)