Utilizing dynamically coupled cores to form a resilient chip multiprocessor

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2007, Pages 317-326

  LaFrieda, Christopher ^a   Ipek, Engin ^a   Martínez, José F ^a   Manohar, Rajit ^a  

^a Cornell University ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER HARDWARE; DATA MINING; FAULT TOLERANT COMPUTER SYSTEMS; LEAKAGE CURRENTS; PROGRAM PROCESSORS;

CHIP MULTIPROCESSORS (CMP); COMMUNICATION HARDWARE; HARD ERRORS; MANUFACTURING DEFECTS;

MICROPROCESSOR CHIPS;

EID: 36049042981     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2007.100     Document Type: Conference Paper

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