Cherry: Checkpointed early resource recycling in out-of-order microprocessors

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn 2002-January, Issue , 2002, Pages 3-14

  Martinez, Jose F ^a   Renau, Jose ^b   Huang, Michael C ^c   Prvulovic, Milos ^b   Torrellas, Josep ^b  

^a Department of Obstetrics Gynecology   (United States)

^b University of Illinois at Urbana Champaign   (United States)

^c University of Rochester   (United States)

Author keywords

Checkpointing; Computer aided instruction; Engines; Laboratories; Microprocessors; Out of order; Pipelines; Recycling; Registers; Retirement

Indexed keywords

COMPUTER ARCHITECTURE; ENGINES; LABORATORIES; MICROPROCESSOR CHIPS; PIPELINES; RECYCLING;

BRANCH MISPREDICTIONS; CHECK POINTING; OUT OF ORDER; OUT-OF-ORDER EXECUTION; REGISTERS; RESOURCE RECYCLING; RETIREMENT; SPECULATIVE MULTITHREADING;

COMPUTER AIDED INSTRUCTION;

EID: 84948992629     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2002.1176234     Document Type: Conference Paper

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