Compact physical models for power supply noise and chip/package co-design of gigascale integration

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2007, Pages 1659-1666

  Gang, Huang ^a   Sekar, Deepak C ^a   Naeemi, Azad ^a   Shakeri, Kaveh ^b   Meindl, James D ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b CYPRESS SEMICONDUCTOR   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; PARAMETER ESTIMATION; SWITCHING;

DOMAIN EQUIVALENTS; GIGASCALE INTEGRATION;

ELECTRIC POWER TRANSMISSION;

EID: 35348843366     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.374017     Document Type: Conference Paper

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