Compact physical IR-drop models for GSI power distribution networks

Proceedings of the IEEE 2003 International Interconnect Technology Conference, IITC 2003

Volumn , Issue , 2003, Pages 54-56

  Shakeri, K ^a   Meindl, J D ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Boundary conditions; Current density; Microelectronics; Packaging; Partial differential equations; Pins; Power distribution; Power systems; SPICE; Voltage

Indexed keywords

BOUNDARY CONDITIONS; CIRCUIT SIMULATION; CURRENT DENSITY; DROPS; ELECTRIC POTENTIAL; ELECTRONICS PACKAGING; MICROELECTRONICS; PACKAGING; PARTIAL DIFFERENTIAL EQUATIONS; SPICE; STANDBY POWER SYSTEMS;

ARRAY PACKAGES; PACKAGE PINS; PINS; POWER DENSITIES; POWER DISTRIBUTION NETWORK; POWER DISTRIBUTIONS; SPICE SIMULATIONS; SUPPLY VOLTAGES;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 21044431593     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2003.1219711     Document Type: Conference Paper

References (3)

1. Semiconductor Industry Association, "International Technology Roadmap for Semiconductors (ITRS)," 2001.
2. L. A. Arledge, W. T. Lynch, " Scaling and Performance Implications for Power Supply and Other Signal Routing Constraints Imposed by I/O Pad Limitations," Proceedings of the IEEE symposium on IC/Package Design Integration, pp. 45-50, February 1998.
3. J. W. Joyner, J. D. Meindl, "A Compact Model for Projection of the Future Power Supply Distribution Network Requirements," Asic/SOC Conference, pp. 376-380, September 2002.