Effects of on-chip inductance on power distribution grid

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2005, Pages 63-69

  Muramatsu, Atsushi ^a   Hashimoto, Masanori ^b   Onodera, Hidetoshi ^a  

^a KYOTO UNIVERSITY   (Japan)

^b OSAKA UNIVERSITY   (Japan)

Author keywords

Decoupling capacitance; On chip inductance; Power distribution network; Power supply noise

Indexed keywords

CAPACITANCE; ELECTRIC POWER DISTRIBUTION; ELECTRIC WIRE; NOISE ABATEMENT;

DECOUPLING CAPACITANCE; ON-CHIP INDUCTANCE; POWER DISTRIBUTION NETWORK; POWER SUPPLY NOISE;

INDUCTANCE;

EID: 29144439210     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1055137.1055152     Document Type: Conference Paper

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